设计采用Verilog自动贩卖机实施

高电平置数，高电平清零的同步D触发器

基于FPGA cyclone2的偶数分频模块，可实现自定义分频数(Based on FPGA cyclone2 even number of frequency divider module, custom frequency divider can be realized.)

说明：  FPGA实现的AD采样控制程序的源码，欢迎大家下载(FPGA implementation of the AD sampling control)

控制8个发光二极管中的一个发光二极管发光，其它7个发光二极管都出于截止状态，发光二极管的导通顺序按照向左或向右两个方向移动，并且通过按键控制发光二极管循环发光移动的方向。(Control of a light-emitting diode light-emitting eight light-emitting diodes, the other seven light-emitting diodes for the cut-off state, light-emitting diode conduction order in accordance with the left or right move in both directions, and light-emitting diode cycle luminous button control mobile direction.)

VHDL operators basics

ddr3使用教学(DDR3 using teaching)

不错的verilog学习语言资料，详细地对verilog语言中的重要语句应用进行分析。(A good the verilog learn language information, verilog language statement application.)

半带滤波器，工作在采样率122.88Msps上(Half-band filter, working at the sampling rate of 122.88 Msps)

说明：  8位RISC-CPU设计和测试文件，5位操作码支持32条指令，含堆栈实现子程序调用功能。(8-bit risc-cpu design and test file, 5-bit opcode supports 32 instructions, including stack to realize subroutine call function.)

利用matlab，对偏振控制器进行仿真，最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)