A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, an...

使用VHDL语言实现对快速傅立叶变换算法的实现，并通过仿真验证其正确性。(Using VHDL language implementation for the realization of fast Fourier transform algorithm, and its correctness is validated by computer simulation.)

fpga hardware hevc implementation

verilog 写的 “梁祝”乐曲演奏电路-verilog wrote " The Butterfly Lovers" music concert circuit

program for half subtractor.

vhdl八位十进制数字频率计的设计，顶层和数码管扫描模块(vhdl eight decimal digital frequency meter design, top-level and digital tube scanning module)

VHDL实现的超前进位加法器-the VHDL-ahead Adder

有很多例子及测试代码，对初学者很有帮助，很容易上手-a lot of examples and test code, useful for beginners, it is easy to get started

利用LPM_MUIT宏模块设计一个四位数据乘法器(Use LPM_MUIT macro module design a four data Multiplier)

基于diligent公司的basys2开发板的四位有符号二进制数的除法

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