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ss
it is a new describng system for it field
- 2018-02-05 22:48:15下载
- 积分:1
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rs232串口协议
主要是主机对寄存器进行配置传输数据
- 2022-01-24 13:57:46下载
- 积分:1
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32位浮点乘法verilog HDL
它是基于Verilog硬件描述语言浮动乘法器的数字化设计。该设计可以实现全功能,是更好的灵活性,其理论基础上浮动计算并补偿位移倍增。
- 2023-01-22 04:10:03下载
- 积分:1
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rs232
异步串行传输的verilog hdl 功能文件以及测试文件(The verilog hdl source and the testbench of asynchronous serial transmission )
- 2009-12-27 16:02:38下载
- 积分:1
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CPU_Verilog
此代码完成了流水线CPU的设计。其中有ALU,控制模块,UART等verilog代码。(This code completes the design of pipelined CPU)
- 2017-07-06 19:45:33下载
- 积分:1
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MAX48_cn
MAX481、MAX483、MAX485、MAX487-MAX491以及
MAX1487是用于RS-485与RS-422通信的低功耗收发器,
每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)
- 2012-07-10 21:28:46下载
- 积分:1
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H.264 VHDL Encoder
nova是一个低功耗的H.264/AVC基线解码器,面向移动应用。它是一种专用的、全硬连线的ASIC设计,不使用任何GPP/DSP核心。H.264硬件编码器被设计成一个模块化系统,具有小型、高效、低功耗的组件,可以完成定义良好的任务。设计的主要目的是使一个可伸缩的编码器适用于百万像素的图像,适用于相机头和低功耗录像机。
- 2022-02-21 19:25:26下载
- 积分:1
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bubblesort
根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果,含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)
- 2021-05-08 13:28:35下载
- 积分:1
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层合板刚度
层合板的刚度的计算和验算,包括拉伸刚度A、弯曲刚度D以及耦合刚度B。
首先要给定层合板的各个参数,具体有:层合板的层数N;各单层的弹性常数E1、E2、 、G12;各单层对应的厚度;各单层对应的主方向夹角 。(The stiffness of laminated plates is calculated and checked, including tensile stiffness, A, flexural stiffness, D and coupling stiffness B. First of all, it is necessary to give the parameters of laminated plates, such as the number of plies N, the elastic constants of each layer, E1, E2, and G12, the thickness of each monolayer, and the angle of the main direction corresponding to each single layer.)
- 2021-01-18 09:28:43下载
- 积分:1
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interpolate4
调制信号后4倍内插的verilog代码,用于基带成型滤波器输入数据(4 times after modulation signal interpolation verilog code, used to baseband shaping filter input data)
- 2017-04-20 15:52:09下载
- 积分:1