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提供的i2c控制IP核 master
open cores 提供的i2c控制IP核 可直接在FPGA上使用。并带有相关的测试程序(endorsed by the i2c controller IP provided by the open cores on the FPGA. With the relevant test procedures)
- 2012-05-23 10:31:27下载
- 积分:1
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VHDL
FPGA 12864显示程序 VHDL程序!!(FPGA 12864 show program
)
- 2012-05-30 22:09:54下载
- 积分:1
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Moltiplicatore-FP
moltiplicatore floating point
- 2009-05-12 20:26:28下载
- 积分:1
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UART的源(格版)
UART 源码 (lattice version)-UART source (lattice version)
- 2022-10-19 10:25:04下载
- 积分:1
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xilinx平台DDR3设计教程之综合篇_中文版教程
存储器DDR3在Xlinix平台上的设计教程和综合应用(Design course and comprehensive application of memory DDR3 on Xlinix platform)
- 2018-11-02 11:23:55下载
- 积分:1
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Simple I2C controller
Simple I2C controller
-- 1) No multimaster
-- 2) No slave mode
-- 3) No fifo s
--
-- notes:
-- Every command is acknowledged. Do not set a new command before previous is acknowledged.
-- Dout is available 1 clock cycle later as cmd_ack
-Simple I2C controller-- 1) No multimaster-- 2) No slave mode-- 3) No fifo"s---- notes :-- Every command is acknowledged. Do not set a ne w command before previous is acknowledged.-- D is available out a clock cycle later as cmd_ack
- 2023-03-08 10:05:03下载
- 积分:1
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SinGen
使用Verilog编写的正弦波生成工程,使用ROM核产生,利用mif文件(Written using Verilog sine wave generation projects using ROM nuclear generation, use mif file)
- 2015-04-24 16:40:21下载
- 积分:1
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一个可综合的串并转换接口verilog源代码
一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
- 2022-03-17 00:42:34下载
- 积分:1
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lanqiu24s8
篮球24s计时。计时器递减计数到零时,数码显示器显示‘0’并停止,同时发出报警信号(basketball 24 seconds)
- 2012-06-11 16:04:01下载
- 积分:1
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tb_axi4
介绍如何使用vivado来调用和封装IP核,测试AXI4总线的三种功能协议。(It describes how to use vivado to call and package IP core test three functions AXI4 bus protocol.)
- 2020-07-03 08:40:01下载
- 积分:1