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edaczcjfq
出租车计费,器设计一个出租车自动计费器,计费包括起步价、行车里程计费、停止和暂停不计费三部分。现场模拟汽车的启动、停止、暂停和换挡状态。分别用四位数码管显示金额和里程,各有两位小数,行程 3公里内,起步费为6元,超过3公里,以每公里1.3元计费(Car repair billing device)
- 2018-05-04 11:34:33下载
- 积分:1
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facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1
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multiply
由verilog编写的乘法器,通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分:1
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verilog
用Verilog语言编写的产生正弦波和方波的程序(Generate sine and square wave Verilog language program)
- 2021-04-25 20:48:46下载
- 积分:1
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3g-sdi
3g-sdi驱动器,用于全高清视频FPGA解决方案(3g-sdi driver)
- 2013-08-06 21:59:37下载
- 积分:1
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bandpass
FIR有限冲击响应下带通滤波器的构建及滤波器仿真(通过matlab和simulink两种方法实现)(FIR finite impulse response bandpass filter and filter simulation (via two methods matlab and simulink))
- 2013-03-13 18:32:07下载
- 积分:1
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DI-S-AND-V
这个程序是为了区分SIGNAL和VARIABLE在不同情况下要怎样使用的例程,程序中使用了三种情况来说明问题(This program is designed to differentiate between routine SIGNAL VARIABLE in different situations and how you want to use, the program uses the three cases to illustrate the problem
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- 2015-01-12 12:56:26下载
- 积分:1
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实现BCD码的加法,用VHDL实现,是书籍上配套的
实现BCD码的加法,用VHDL实现,是书籍上配套的-BCD ADDER,Using VHDL
- 2022-02-10 02:09:10下载
- 积分:1
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程序
传感器是一种检测装置,能感受到被测量的信息,并能将感受到的信息,按一定规律变换成为电信号或其他所需形式的信息输出,以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分:1
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Continuous_acoustic_emission_board
多通道连续声发射数据采集,每个通道最大5M,采用verilog编程,内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)
- 2020-06-25 13:00:01下载
- 积分:1