基于MAX485芯片的RS485通信Verilog代码

Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorithms existing, and I feel there is a need to understand how they work. So this text explains a number of popular encryption algorithms and makes you look at them as mathematical formulas.

用Verilog实现的交通信号灯控制，主干道和支路通行的时间不相等(Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time)

使用matlab实现cdma 系统的rake接收机，比较最大比合并，等增益合并和选择性合并接收算法的性能(脢 鹿 脫脙matlab脢渭脧脰cdma 脧渭脥 鲁 渭脛rake 陆 脫脢脮 禄煤 拢 卢 卤 脠 陆 脧 脳 卯)

Universal Shift Register

Firmware for autotuning Sensor

verilog编写的uart发送模块，起始位，数据位，可选择的奇偶校验位，停止位。仿真可用

这些文件是可以帮助我们初学者在超大规模集成电路与 FPGA 设备接口的外围设备。ALU 单元介绍算术和逻辑单元的功能和其在 FPGA 中的实现。Mutiplication 和积累股职能有 MAC 单元程序。在电机相接，陡峭电机运行中前进的方向。液晶屏显示程序可以帮助我们在 16 × 2 显示中显示的 ASCII 字符。串行通讯程序将传输和接收字符从和到的 FPGA 和 PC。

verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)

Design FPGA in Labview

针对京微雅阁的CME300 FPGA教程，里面有几个例程，并附有源代码，初学者可尽快入门。(For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.)