基于MAX485芯片的RS485通信Verilog代码

异步 fifo 证实使用系统 verilog.100 英寸 %功能覆盖率和代码覆盖率已经 provided.environment createddifferent 测试用例为了满足要求而编写的。

主要论述了基于FPGA的末制导雷达伺服系统设计。结合末制导雷达讨论其电机控制、二阶伺服系统性能和PID校正算法,利用VHDL语言设计,实现基于FPGA的方位步进电机开环定位控制和俯仰直流电机闭环速度控制的伺服系统。结合实际应用中遇到的问题,提出了基于"反馈控制"理论的有效的补偿算法,该算法提高了伺服系统的稳定性、快速性和精度。(Mainly discusses the design of terminal guidance radar servo system based on Field Programmable Gates Array(FPGA).It includes the system’s electric machine control,second-order servo system performance and PID correction algorithm based on Virtual Hardware Description Language(VHDL) on azimuth stepping motor open loop positioning control and pitch direct current electric machine closed loop speed control of the FPGA servo system.In allusion to some factual problems during its application,presents corresponding effective solutions based on traditional control theory "Feedback Control".The fact proves that these methods can greatly improve the stability,speediness and precision of the original servo system.Additionally,a basic algorithm which can be realized in a terminal guidance radar servo system is given)

FPGA的测频程序，用了D触发器，能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)

在FPGA开发平台上，通过按键控制一个弹球小游戏。输出VGA显示信号输送到显示器上显示(On the FPGA development platform button control of a pinball game. VGA output signal is supplied to the display displayed on the display)

文件中包含BFSK、DPSK、BPSK、QPSK等等数字调制程序。(File contains the BFSK, DPSK, BPSK, QPSK, and so on digital modulation process.)

采用Verilog语言，实现db8小波分解(Realizing wavelet decomposition)

应用背景原创VERILOG HDL 实现数据指令CACHE的操作，LRU替换算法，包括1路组相连和2路组相连，包含ISE工程文件，亲测可用，初学者必备关键技术采用verilog语言设计的ARM cache，包含tb文件，写回策略。LRU替换算法

FFT的MATLAB实现。非常完整的实现FFT过程，速度很快。(The FFT in MATLAB. Contains more than one source, the FFT process. Learning Reference essential)

基于fpga的uart串口通信协议，64位数据(Uart communication protocol based on fpga, 64-bit data)

VHDL实现国家SM4加密算法（ECB）模式 (VHDL to achieve national SM4 encryption algorithm (ECB) mode)