i2c协议读写寄存器实现

利用matlab提供的firhalfban函数设计阶数为16、通阻带容限为0.0001的半带滤波器。仿真测试滤波前后的信号时域图，回执滤波器的频率响应特性图(Provided firhalfban function using matlab design order of 16, through the 0.0001 stopband wool half-band filter. Simulation test filtered time domain signal before and after, receipt filter frequency response characteristic diagram)

自编同步串口收发，单端信号可实现板内，配合422或LVDS板间传输效果不错内附pingpang缓存接受的例程，帮助快速构建代码，FIFO请根据器件生成或自编

说明：  一个简单的键盘接口模块程序，对键盘输入的数据和时钟信号进行过滤。过滤后的数据信号PS2Df将被送入两个11位移位寄存器中(A simple keyboard interface module program filters keyboard input data and clock signals. The filtered data signal PS2Df will be fed into two 11-bit displacement registers.)

Fonts for LCD 162x64 (6x8)

液晶显示屏显示汉字“年”的驱动程序VHDL(nian VHDL)

本压缩包，包换一个用verilog语言实现的huffman编码源程序，同时给出了众多论文和基础知识的文档资料，一应俱全。(The compression package, shifting one using huffman coding verilog language source code, and gives basic knowledge of many papers and documentation, everything.)

USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)

说明：  介绍了FPGA的使用以及modelsim联合synplify工具的使用方法(This paper introduces the use of FPGA and the use of Modelsim joint Synplify tool)

用verilog hdl语言编写的fpga与片外sram 的读写控制(With the verilog hdl language fpga sram chip with read and write control)

使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)