This program is Verlog language program, using QUARTUS6.0 preparation, program i...

数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84-4验证-VHDL design of digital stopwatch, accurate to the percentage of seconds in the six digital tube display, respectively, have seconds, minutes, hours, through the target chips EPF10KLC84-4 verification

I2C IP for Quartus V9.0 sp2, can used in SOPC builder.

CORDIC(Coordinate Rotation Digital Computer)算法即坐标旋转数字计算方法。 CORDIC算法,能够通过平移和累加快速实现基础的数学函数,包括三角函数,开方,指数,对数,平方根等函数。(CORDIC (Coordinate Rotation Digital Computer) algorithm for the coordinate rotation digital calculation. CORDIC algorithm can be achieved through the rapid translation and accumulation based on mathematical functions, including trigonometric, square root, exponential, logarithmic, square root and other functions.)

64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核(64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS)

D-flip flop vhdl implement code

STOPWATCH FPGA SEVEN SEGMENT DISPLAY

verilog 我自己写得按单脉冲发生器，通过了综合和仿真，和频率可变的正弦波发生器，-verilog I write by a single pulse generator, through the synthesis and simulation, and variable frequency sine wave generator,

实现温度显示，接温度传感器。在4数码管上显示小数点后两位的温度(temperture of FPGA)

DDS的VHDL程序，相当好，值得下载，共享才是王道(DDS, VHDL program is quite good, worth downloading, sharing is king)

给FPGA程序，使之产生信号，驱动AD7606读取数据，并行模式。(give FPGA signal to read AD7606)