This program is Verlog language program, using QUARTUS6.0 preparation, program i...

基于fpga的矩阵求逆运算，适用xilinx v6板卡(Inverse operation based on fpga matrix)

使用verliog设计实现LUT查找表乘法器，通过modelsim仿真验证通过(Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim)

说明：  基于FPGA的数字式相位测量仪的设计与制作(FPGA-Based Digital Phase Meter Design and Production)

altera 公司的15IP源码 亲自测试还不错 有DIV, CONTER-ALTERA the 15IP source personally tests are also good DIV, CONTER

Verilog HDL实现的I2C Slave模拟-achieve the Verilog HDL simulation I2C Slave

华为公司学习verilog的资料，绝密资料，想学习verilog编程，想学习FPGA，想以后进华为公司的都可以看看。(Huawei learning verilog information, confidential information, want to learn verilog programming, want to learn FPGA, think later into the Huawei can see.)

用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine

用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试 -Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test

译码器，将八位输出转换为七段译码显示，相当于7448驱动译码管-Decoder, the 8 output is converted to seven segment decoding shows that the equivalent of 7448

Firmware for autotuning Sensor