ask调制，基于VHDL仿真平台，解调同样给出，此程序经过验证

用于视频图像编码的8×8DCT变换，可用于MPEG4.H263等VHDL编程-For video images encoded 8 × 8DCT transform, can be used to MPEG4.H263 such as VHDL Programming

基于fpga的物理不可克隆函数（PUF）模块的实现(A PUF Design for Secure FPGA-Based Embedded Systems)

FPGA神经网络设计（影印本），全英文，很有用(FPGA neural network design (photocopies), all in English, very useful)

应用verilog编程语言控制VGA显示屏显示一幅图片。(Application verilog programming language control VGA display shows a picture.)

32 bit RISC Processor with 3 stage pipeline

音乐计算器的设计与实现。完成加减与或比较计算，能显示进位借位零位，能根据结果的正负发出两首不同的音乐。(Design and implementation of music calculator. Complete addition and subtraction and comparison calculation, can display carry and borrow zero, can send out two different music according to the positive and negative results.)

基于APB总线的UART详细设计方案和实现(APB-based detailed design and implementation of UART)

高性能FPGA应用领域及其研究，FPGA的开发流程-High-performance FPGA applications and research, FPGA development flow

fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)

8倍抽取的DDC模块。verilog写的，调试通过(failed to translate)