vhdl实现的鼠标协议，代码可读性高，适合作为参考案例。

说明：  verilog开发的经典教材，详细介绍了语法，常见历程，以及通用的程序段(verilog development of the classic materials, detailed information on syntax, common history, as well as the common program segment)

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.

它是一种以地址总线数据总线为结构的8位微处理器，主要由两部分组成：一是控制单元，数据通路控制单元控制微处理器的所有块、寄存器和部件，数据通路由地址和数据通路信号处理组成指令读写加法；

This the adder VHDL code, it contains input and output fild, also simulate file-adder

利用FPGA控制VGA显示器显示字符汉字的程序，里面有注释。(VGA display with FPGA control procedures Kanji characters, there are comments.)

说明：  基于Basy3的贪吃蛇小游戏，实现了相关功能。(Snake Eating Game Based on Basy3)

说明：  how to come ture a costas loop in FPGA with verilog,it is very useful on project

一个精确时钟的v-log程序，只用一个全局时钟，增加了精确度(An accurate clock in the v-log program, only one global clock, increased accuracy)

通信中加扰/解扰算法。FPGA源代码，verilogHDL语言实现，包含测试程序。(Perturbation/perturbation algorithm. FPGA source code, verilogHDL language implementation, including test procedures.)

周立功Fusion StartKit，fpga开发板的实验例程，Flash Memory初始化RAM实验(ZLG Fusion StartKit, fpga development board test routines Flash Memory Initialize RAM experiments)