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4*4键盘C51单片机程序.本程序已经调试通过,4*4键盘接P1口数据从P2的8个发光二极管来表示...
4*4键盘C51单片机程序.本程序已经调试通过,4*4键盘接P1口数据从P2的8个发光二极管来表示-4* 4 keyboard C51 Singlechip procedures. This procedure has been debugging through, 4* 4 keyboard access data from the P2 port P1 of the eight light-emitting diodes to indicate the
- 2022-11-20 04:25:03下载
- 积分:1
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密码保护安全门使用 8051
这是受密码保护安全门使用 8051 的代码。该项目由步进电机、 液晶、 蜂鸣器和键盘组成。关于紧迫的密码显示为 * 在液晶屏上,8051 检查正确的密码,是否密码不正确,步进电机按顺时针方向旋转打开的门。在延迟后,步进电机旋转逆时针把门关上。有每天设置用户密码的密码。ver 8 是最终的代码。
- 2022-03-22 16:34:07下载
- 积分:1
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八月桂花香的蜂鸣器调试程序,有兴趣的下载
八月桂花香的蜂鸣器调试程序,有兴趣的下载-The buzzer八月桂花香debugger, are interested in downloading
- 2022-06-14 03:47:37下载
- 积分:1
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这是基于蓝海微芯LJD
这是基于蓝海微芯LJD-SY-XA+单片机开发系统的远程无线监控系统的DA及AD采集和数码显示的部分,GPRS无线控制部分正在整理,稍后再传-This is based on LAN Hai-core LJD- SY- XA MCU Development System Remote Wireless Monitoring System DA and AD Acquisition and digital display, GPRS wireless control of the process of collating and later the re-
- 2022-03-14 16:19:39下载
- 积分:1
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PIC16F1937 IIC读取数据代码
PIC16F1937 IIC读取数据代码-PIC16F1937 IIC read data code
- 2022-05-15 12:03:01下载
- 积分:1
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good things, we look at the following ah
好东西,大家来看以下呀 -good things, we look at the following ah
- 2023-04-16 18:05:03下载
- 积分:1
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基于IAR平台STM32处理器实现虚拟串口的源代码
基于IAR平台STM32处理器实现虚拟串口的源代码-IAR platform processor-based STM32 virtual serial port source code
- 2022-04-07 04:20:34下载
- 积分:1
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yaffs2文件系统源码
学习编程最好的教材就是源代码,yaffs2文件系统源码,是学习yaffs2文件系统的最好教材。
- 2022-08-18 21:18:01下载
- 积分:1
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基于MSP430F5342单片机的SIM900 GPRS 数据透明传输模块
应用背景实现最基本的gprs 通讯功能,同时提供最低的能耗需求。
在此基础上,软件功能基于ucosII‐2.92 版本进行开发,软件提供demo 开源,硬件原
理图进行开源,软件未开源部分使用lib 库实现,提供lib 库,未开源部分为AT 指令
的流操作。关键技术由于目前物联网的推进以及GPRS 数据业务在各个行业的应用,该类似的设计产品在市
场上仍将占据一块很大的区域。同时现有的产品发展将面向客户以及模块化设计,单独设计
该款模块,用户只需设置很少的参数即可立即使用,同时模块将分别实现正常工作以及低功
耗工作两种模式。
- 2022-01-26 04:33:26下载
- 积分:1
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A Tiny Microcontroller for FPGAs
应用背景Abstract—Leros is a tiny microcontroller that is optimized for
current low-cost FPGAs. Leros is designed with a balanced logic
to on-chip memory relation. The design goal is a microcontroller
that can be clocked in about half of the speed a pipelined on-chip
memory and consuming less than 300 logic cells.
The architecture, which follows from the design goals, is a
pipelined 16-bit accumulator processor. An implementation of
Leros needs at least one on-chip memory block and a few hundred
logic cells.
The application areas of Leros are twofold: First, it can be used
as an intelligent peripheral device for auxiliary functions in an
FPGA based system-on-chip design. Second, the very small size
of Leros makes it an attractive softcore for many-core research
with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented
- 2023-09-03 01:00:04下载
- 积分:1