altera公司cycloneII全系列说明书，实用

本文件时VHDL的各种编写规范，有助于开发者在平时养成好的编码习惯(This document, the various write VHDL specification, helps developers to develop good coding habits in peacetime)

键盘计算器，可实现加减乘数运算 基于fpga nios2(Keyboard, calculator, addition and subtraction can be realized based on fpga nios2 multiplier operator)

double edfe trigger d latch

Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear

FPGA数字AGC(帮同学做的毕业设计)-FPGA digital AGC (help students to do the graduation project)

verilog语法说明，包含verilog golden reference guide，verilog 2001语法(verilog golden reference guide)

基于FPGA的交通灯代码，VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)

实现线性反馈移位寄存器的verilog实现(lfsr use verilog for the zip)

实现了四bit计数器的功能，使用的是VHDL语言描述(Four-bit counter, using the VHDL language description)

一个关于降低现代通信系统中高峰均比信号的matlab算法，对于研究数字预失真基于FPGA实现的有一定作用！(A modern communication system on the lower than the peak signal matlab algorithm for FPGA-based study of digital pre-distortion to achieve a certain effect! )