8层电梯FPGA控制系统

这是一本FPGA仿真验证的经典丛书，可以从中学习到如何编写系统的testbench,也可以是IC设计中FPGA原型验证编写系统及testbench的经典书籍。((Kluwer) Writing Testbenches Functional Verification of HDL Models.pdf)

这是篇<基于FPGA 的OFDM 宽带数据通信同步系统设计与实现>, 觉得甚是有用，大家共同学学。(This is the article <FPGA-OFDM-based broadband data communication systems design and implementation of synchronous> that even be useful, we all learn together.)

这是一个很好用的实现PC机与FPGA之间的数据传输

使用fpga基于积分分离的pid算法进行温控的程序，经实验证明很稳定-Fpga points based on the use of separate pid process temperature control algorithm, the experiment proved to be stable

一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)

基于FPGA的电子密码锁设计与实现，语言是VHDL语言，有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)

nova是一个低功耗的H.264/AVC基线解码器，面向移动应用。它是一种专用的、全硬连线的ASIC设计，不使用任何GPP/DSP核

用verilog hdl编写的一些例程，包括加法器/减法器等等，例子较多就不一一列举了(Verilog hdl prepared with some routines, including the adder/subtraction, etc., for example, more is not to enumerate the)

说明：  编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法(Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange)

ADI ad9361 vivado 下源代码(ADI ad9361 vivado source code)