我做的java手机游戏，菜鸟作品，希望对菜鸟有用

全套CANopen资料，英文原版，对开发汽车级和工业级的CANopen通讯编程，非常有用。 我们的CAN高层协议就是参照这个资料作出来的。-complete information, the English original. Development of automobile and industrial-grade Application of CANopen communications programming, very useful. We CAN senior agreement is the light of this information to us.

用visual c++编写的MFC程序，可以实现PC对PC的通信及PC对单片机的通信。-Visual c++ using the MFC process to prepare, you can achieve PC to PC and PC communication on single-chip communications.

We investigate the case of independent Rayleigh faded paths between antenna elements and find that with high probability extraordinary capacity is available. Compared to the baseline n = 1 case, which by Shannon’s classical formula scales as one more bit/cycle for every 3 dB of signaltonoise ratio (SNR) increase, remarkably withMEAs, the scaling is almost like n more bits/cycle for each 3 dB increase in SNR. To illustrate how great this capacity is, even for small n, take the cases n = 2, 4 and 16 at an average received SNR of 21 dB. For over 99 of the channels the capacity is about 7, 19 and 88 bits/cycle respectively, while if n = 1 there is only about 1.2 bit/cycle at the 99 level. For say a symbol rate equal to the channel bandwith, since it is the bits/symbol/dimension that is relevant for signal constellations, these higher capacities are not unreasonable. The 19 bits/cycle for n = 4 amounts to 4.75 bits/symbol/dimension while 88 bits/cycle for n = 16 amounts t

A 64 sub carrier OFDM system based on the parameter of Mean square error

GSM_protocal，GSM的短消息协议，^_^-GSM_protocal, GSM short message protocol, ^ _ ^

GSM移动台漫游规律研究的仿真程序(VC++实现)清单,提供了六方向和八方向两种模型-GSM Mobile Station Roaming Study of Simulation Program (VC++ Realize) list, providing a six-and eight-direction direction of the two models

很好的brew教程。可以作为brew开发的进阶教程-brew development book

三篇关于Viterbi FPGA编译码器的优化设计文档： 1、Viterbi译码器的FPGA设计实现与优化.pdf 2、Viterbi译码器的低功耗设计.pdf 3、基于FPGA的高速并行Viterbi译码器的设计与实现.pdf-3 on the Viterbi FPGA optimization codecs design documents: 1, Viterbi decoder FPGA Design Implementation and Optimization. Pdf2, Viterbi decoder, low-power design. Pdf3, high-speed FPGA-based parallel Viterbi decoder Design and Implementation. pdf

用c++编写的MODBUS Serial RTU Simulator,效果很不错-MODBUS Serial RTU Simulator ,code is c++!

现有数字信号自动调制识别方法大多只适用于无记忆信号，如PSK、ASK、FSK信号等。将有记忆 信号(MSK信号)和无记忆信号一起考虑，提出了一种改进的数字信号自动识别方法。该方法采用信号的瞬时统 计量作为特征参数，采用多层神经网络作为分类器。计算机仿真表明：当噪声采用高斯白噪声，并且信噪比大于 l5 dB时，识别率高于96％ ；当信噪比不低于l0 dB时，识别率不低于90％。-Existing digital signal automatic modulation recognition methods are mostly applied only to memoryless signals, such as PSK, ASK, FSK signals. Will have a memory signal (MSK signal) and non-memory signal into consideration, an improved digital signal automatic identification method. This method is the use of the instantaneous signal statistics as a characteristic parameter, the use of multi-layer neural network as classifier. Computer simulation shows that: When the noise using Gaussian white noise, and signal to noise ratio greater than l5 dB, the recognition rate is higher than 96 when the signal to noise ratio not less than l0 dB, the recognition rate of not less than 90.