VHDL Storage/counter design

VHDL与Verilog的比较-VHDL and Verilog comparison

Decoder using Miller method for UHF reader

说明：  基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)

rs编码vvhdl 希望能通过 我不晓得具体对大家有用否 希望懂rs编码的多多交流 -rs coding vvhdl I do not want to be able to know the specific useful whether you want to understand a lot of coding rs exchange

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

实现扰码的功能，主要为64位在pcs子层传输的扰码器设计(To achieve the functions of scrambling code)

2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发(Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development)

一个NiosII可用的LCD12864 IPcore，含例子-A NiosII available LCD12864 IPcore, with examples

OpenRISC 1200 cpu with integrated patches to support ORPSOC and FuseSOC builders

zedboard partial reconfiguration tutorial