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DE2_CCD
说明: 此程序用来实现图像的采集和帧数的计算功能。(Image acquisition and calculation of the number of frames.)
- 2011-04-17 09:43:37下载
- 积分:1
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synplify-hand-book(English)
Syplify经典英文教程。内含众多实验例程,Lab 1 Basic Synplify Run;Lab 2 Analyzing Critical Path and Assigning Timing;Lab 3 FSM (Finite State Machine) Compiler Constraints and Attributes(Syplify classic English tutorial. Contains numerous experiments routine, you can help learners to quickly grasp Syplify tips, is a rare foreign experiments tutorial.)
- 2015-04-20 09:01:06下载
- 积分:1
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Taxi-automatic-billing
出租车自动计费系统的verilog程序代码(Taxi automated billing system verilog code)
- 2009-10-08 10:07:15下载
- 积分:1
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CycloneII_NiosII_2C35_Rev02_DB_SCH
说明: nios开发板电路图CycloneII_NiosII_2C35_Rev02_DB_SCH.zip(nios development board circuit CycloneII_NiosII_2C35_Rev02_DB_SCH.zip)
- 2010-03-28 20:50:27下载
- 积分:1
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使用VHDL语言操作LCD1602
这篇是利用VHDL语言控制LCD1602芯片来显示时钟的简单代码。LCD1602顾名思义是一种02*16,即为两行十六列的液晶显示屏,液晶两行,每行可以显示16个字符,但是CGRAM及CGROM里面一共有160个字符,包括阿拉伯数字,英文字母大小写,常用符号及日文。每个字符对应于一个ASCII码值,在液晶显示屏上显示对应的字符时候,只需要将对应的ASCII码写到DDRAM中就好。
- 2022-07-05 01:39:17下载
- 积分:1
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Center
使用Xilinx3S400开发的钢板检测算法中心化算法,通过测试。(a vhdl-program use Xilinx3S400)
- 2009-04-12 22:09:45下载
- 积分:1
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Using VHDL programming asynchronous FIFO procedure can be run by the debugger
使用VHDL编程的异步FIFO程序 经调试可运行-Using VHDL programming asynchronous FIFO procedure can be run by the debugger
- 2022-03-23 14:37:37下载
- 积分:1
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希尔伯特变换是通信系统中的一个重要组成部分,如:
The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it possible to approximate the Hilbert Transform with a digital filter. Due to the non-causal and infinite impulse response of that filter, it is not that easy to get a good approximation with low hardware resource usage. Therefore, different filters with different complexities have been implemented.
The detailed discussion can be found in "Digital Hilbert Transformers or FPGA-based Phase-Locked Loops" (http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4629940).
The design is fully pipelined for maximum throughput.
- 2023-02-02 09:20:04下载
- 积分:1
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This code that genetes a square, sawtooth and a triangular waveform. It is usefu...
This code that genetes a square, sawtooth and a triangular waveform. It is useful for designing a function generator in VHDL.
- 2022-07-04 20:04:24下载
- 积分:1
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用VHDL实现视频控制程序,实现对图像的采集和压缩,
用VHDL实现视频控制程序,实现对图像的采集和压缩,-Using VHDL realize video control procedures, to achieve image acquisition and compression,
- 2022-06-30 23:43:11下载
- 积分:1