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wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1
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ASYNC_FIFO_SYNTH
This file contains async fifo design
- 2014-03-01 20:48:22下载
- 积分:1
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用可编程逻辑器件实现PWM波形即PWM波形发生器
用可编程逻辑器件实现PWM波形即PWM波形发生器-Using programmable logic devices that realize PWM waveform PWM Waveform Generator
- 2022-07-21 11:20:43下载
- 积分:1
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FPGA-design-
FPGA设计的四种常用思想与技巧分享:串并转换设计技巧、流水线设计思想……(FPGA design of four common ideas and techniques)
- 2013-05-22 22:55:38下载
- 积分:1
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router_routing
片上网络NOC基于fpga实现的,routing模块。(NOC-chip networks realized fpga-based, routing module.)
- 2021-03-03 17:19:32下载
- 积分:1
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IIC总线协议,VHDL语言编写,可以直接使用
IIC总线协议,VHDL语言编写,可以直接使用-IIC bus protocol, VHDL language can be used directly
- 2022-07-11 11:04:33下载
- 积分:1
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FPGA.Implementations.of.Neural.Networks
FPGA神经网络设计(影印本),全英文,很有用(FPGA neural network design (photocopies), all in English, very useful)
- 2008-05-21 21:14:28下载
- 积分:1
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snake_VHDL
基于vhdl编写的贪吃蛇游戏,课程设计必备(Based on the VHDL language of the snake game, curriculum design essential)
- 2020-11-06 09:49:50下载
- 积分:1
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pll
说明: fpga配置锁相环完整程序,使用quartus IP核,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:01下载
- 积分:1
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usb_latest[1].tar
sub opercore USB CRC5 and CRC16 Modules ////
//// ////
//// ////
//// Author: Rudolf Usselmann ////
//// rudi@asics.ws ////
//// ////
//// ////
//// Downloaded from: http://www.opencores.org/cores/usb/(sub opercore USB CRC5 and CRC16 Modules//////////////////////// Author: Rudolf Usselmann//////// rudi@asics.ws//////////////////////// Downloaded from: http://www.opencores.org/cores/usb/)
- 2009-11-17 13:53:06下载
- 积分:1