FPGA 的VGA 显示实验

SDIO Verilog Sourcw code

Programmable IIR Filter written in Verilog and its respective modules.

本程序包含：EEPROM的功能模型(eeprom.v)、读/写EEPROM的verilog HDL 行为模块（eeprom_wr.v）、信号产生模块（signal.v）和顶层模块(top.v) ，这样可以有一个完整的EEPROM的控制模块和测试文件，本文件通过测试。(This procedure includes: EEPROM of the functional model (eeprom.v), read/write EEPROM acts of verilog HDL modules (eeprom_wr.v), signal generator module (signal.v) and top-level module (top.v), this can have a EEPROM complete control module and test document, this document is to pass the test.)

基于xilinx fpga开发板的音频读写(audio record and play based on xilinx fpga)

说明：  使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)

自动售货机的状态机实现 自动售货机的状态机实现(this is a automachine)

一种十字路口交通灯在matlab环境中的实现源码(Traffic lights at the crossroads)

此代码基于cyclone III开发。通过一排LED充当乒乓球，模拟打乒乓的游戏

SPI读写AD9361，通过串口回读关键寄存器读写是否正确。(SPI reads and writes AD9361, reads and writes the key registers correctly through the serial port.)

LPC host(By Lattice)