VHDL的循环冗余校验发生器和接收器

这是Verilog语言的if else 语句的优化，不同的写法，编译出来，结果会有很多不同。请大家自己斟酌。-see the Chinese

FPGA实现反正切功能，工程原件，包括测试文件，能够很好实现该功能(FPGA implements arctangent function, original engineering)

比较详细的阐述了图像压缩的原理,并基于DSP和VHDL实现该系统,最后在FPGA上通过.(More detailed exposition of the principles of image compress, and VHDL-based implementation of the system, and finally in the FPGA.)

I2C的实现，可以扩展进而控制有关I2C的器件达到操作员的控制目的。(I2C implementations, can be extended further having control of the I2C device operator control purposes.)

基于FPGA的SD卡音频播放器 经过调试可以直接用，音质很好有MP3的所有功能(FPGA-based audio player, SD card can be directly used after debugging, good sound quality with all the features of MP3)

train controler by verilog

用verilog实现dsp与Fpga接口的同步设计，其功能包括读写操作及四个功能模块，采用两个fifo实现不同时钟域的地址与数据的转换，在quartus ii11.0环境下运行，运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)

按键在数字电路设计中经常用到。按键的弹跳现象是数字系统设计中存在的客观问题。按键是机械触点，当接触点断开或闭合时会产生抖动。为使每一次按键只做一次响应，就必须去除抖动。本文对按键的抖动信号进行了分析，并通过计数器的方式完成了消除抖动电路模块的设计-?

AD9826中文说明书 ，对于学习AD9826元件有很大的帮助。(AD9826 Discription in Chinese)

-- WISHBONE revB2 compiant I2C master core -- -- author: Richard Herveille -- rev. 0.1 based on simple_i2c -- rev. 0.2 april 27th 2001, fixed incomplete sensitivity list on assign_dato process (thanks to Matt Oseman) -- rev. 0.3 may 4th 2001, fixed typo rev.0.2 txt -> txr -- rev. 0.4 may 8th, added some remarks, fixed some sensitivity list issues--- WISHBONE revB2 compiant I2C master core---- author : Richard Herveille-- rev. 0.1 based on simple_i 2c-- rev. 0.2 adolescence 27th 2001, fixed incomplete sensitivity list on assign_d ato process (thanks to Matt Oseman)-- rev. 0.3 m ay 4th 2001, fixed typo rev.0.2 txt-