fifo的IP核的调用和仿真

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

基于verilog的LZS压缩和解压算法，压缩比1；2 。里面带有C原言的代码。已经通过验证！(Verilog based LZS compression and decompression algorithm, compression ratio 1; 2. It has the C code in it. It has been verified!)

高精度直流信号源，DAC1220，20位分辨率，双极性输出(High-precision DC source, DAC1220,20 bit resolution, bipolar output)

FPGA数字信号处理实现原理及方法的例程(FPGA digital signal processing principle and method routines)

ad9957的资料，内含有命令字生成器，适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)

ppm调制的verilog代码 可实现ppm调制(ppm modulation verilog code ppm modulation)

用Verilog实现汉明码编码，经测试可正确使用，代码简洁(Verilog with Hamming code encoding, the test can be used correctly, the code is simple)

这是一个学习verilog HDL的好资料，适合于初学者，讲解详细，从浅入深，学好这个语言，是学习硬件描述语言的好东西，好资料！

This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.

动态获取CPU使用率源码 可以加到压力测试里(Dynamic access to CPU use the source code )