DOE试验设计(SAS_JMP)经典学习案例

【实例简介】SACC2014 大会PPT生成的PDF文件... 都是各个互联网公司的系统演变的工程，大家有兴趣可以看看

使用CC2591作为CC2530的功放, CC2591 PAThe absolute maximum ratings and operating conditions listed in the CC2530 datasheet [1]and the CC2591 datasheet [4] must be followed at all times. Stress exceeding one or more ofthese limiting values may cause permanent damage to any of the devicesNote that these characteristics are only valid when using the recommended register settingspresented in Section 4.6 and in Chapter 8, and the CC2530 - EM reference designOperating Frequency240524835MHzOperating Supply Voltage2036VOperating Temperature-40CTC=25C, VDD=3.0V, f=2440 MHz if nothing else is stated. All parameters are measuredon the CC2530-Cc2591EM reference design [11] with a 50 Q2 loadReceive CurrentWait for sync, -90 dBm input levelWait for sync, -50 dBm input level24mATXPOWER OXE5166mATXPOWER OXD5149mATXPOWER OXC5138mATXPOWER OXB5127mATransmit currentTXPOWER OXA5115ATXPOWER = 0X95100mATXPOWER = 0X8594ATXPOWE=0×75mATXPOWE=0×6579APower Down Current PM2UAISTRUMENTSPage 3 of 19SWRA308ATC=25C, Vdd=3.0V, f= 2440 MHz if nothing else is stated. All parameters are measuredon the CC2530-CC2591 EM reference design with a 50 Q2 loadReceive Sensitivity HGM 1 %PER, IEEE 802. 15.4[6] requires -85 dBm-988dBmReceive Sensitivity LGM1 PER, IEEE 802. 15.4 [6] requires -85 dBm-90.4dBmSaturationlEEE 802.15. 4 [6] requires-20 dBm10dBmWanted signal 3 db above the sensitivity levelIEEE 802.15.4 modulated interferer at ieee 802.15.4 channelsInterferer Rejection+5 MHz from wanted signal, IEEE 802. 15. 4 [6] requires 0 dBdB+10 MHz from wanted signal, IEEE 802. 15. 4 [6] requires 30 dB49dB+20 MHz from wanted signal wanted signal at- 82d BmdBdue to in the external lna and the offset in cc2530 the rssi readouts from cc2530CC2591 is different from rssi offset values for a standalone cc2530 design the offsetvalues are shown in table 4.4High Gain Mode79LoW Gain mode67Real rssi Register value-Rssl offsetISTRUMENTSPage 4 of 19SWRA308ATc=25C, Vdd=3.0V, f=2440 MHz if nothing else is stated All parameters are measuredon the CC2530-CC2591 EM reference design with a 50 Q2 load Radiated measurements aredone with the kit antennaRadiated Emissionwith TXPOWer Oxe5Conducted 2. RF (FCC restricted band)-462|dBmConducted 3. RF(FCC restricted band46.5 dBmComplies withFCC 15.247. SeeChapter 7 for moredetails about regulatoryRadiated 2.RF(FCC restricted band)42.2dBmrequirements andcomplianceIEEE 802.15.4[6]requires max.35%%Measured as defined by IEEE 802.15. 4 6TXPOWER OxE5. f= EEE 802.15. 4 channels13TXPOWER= OXD5. f= EEE 802.15.4 channelsTXPOWER= OXC5 f= EEE 802.15.4 channelsMax error∨ ectorTXPOWER OxB5 f= IEEE 802.15. 4 channelsMagnitude(EVM)TXPOWER OxA5. f= IEEE 802.15.4 channelsTXPOWER 0X95. f= IEEE 802. 15.4 channels643333%%%%%%%TXPOWER= 0x85. f= iEEE 802. 15.4 channelsTXPOWER =0x75 f= IEEE 802. 15.4 channels%TXPOWER= 065. f= iEEE 802. 15.4 channelsThe RF output power of the CC2530- CC2591 EM is controlled by the 7-bit value in theCC2530 TXPOWER register. Table 4.6 shows the typical output power and currentconsumption for the recommended power settings The results are given for Tc= 25 C, Vdd3.0V and f= 2440 MHz, and are measured on the cC2530-CC2591 EM reference designwith a 50 Q2 load. For recommendations for the remaining CC2530 registers, see Chapter 8 oruse the settings given by SmartRF StudioOXE520166OxD519149OxC18138OxB517127OxA5161150x95141000x8513940X75860x651079Note that the recommended power settings given in Table 4.6 are a subset of all the possibleTXPOWER register settings. However, using other settings than those recommended mightINSTRUMENTSPage 5 of 19SWRA308Aresult in suboptimal performance in areas like current consumption, EVM, and spuriousemissionTc=25C, Vdd=3.0V, f=2440 MHz if nothing else is stated All parameters are measuredon the CC2530-CC2591EM reference design with a 50 32 load2221-2V201918171611121314151617181920212223242526251510OxE5OxC5OxA50X850x65540-30-20-1001020304050607080ISTRUMENTSPage 6 of 19SWRA308A98Avg 3.6VAva 3vAvg 2V110111213141516171819202122232425261023.6V-1062V-110-40-30-20-100102030405060708070604020-Wanted signal at:-82 dBm10ISTRUMENTSPage 7 of 19SWRA308ACC2530-CC2591EM High Gain ModeC C2530-CC2591EM Low Gain Mode- CC2530EM40000-100110100908070-60-50-40-30-20-100The IEEE standard 802.15. 4 [8] requires the transmitted spectral power to be less than thelimits specified in table 4.7If-fc>3.5 MHz-20 dB-30 dBmThe results below are given for Tc=25 C, Vdd=3.0V and f= 2440 MHz, and are measuredon the CC2530-CC259 1EM reference design with a 50 Q loadIEEE absoluteChannel 182432.52435243752442524452447.5ISTRUMENTSPage 8 of 19SWRA308AOnly a few external components are required for the CC2530-CC2591 reference design. Atypical application circuit is shown below in Figure 5.1. Note that the application circuit figuredoes not show how the board layout should be done. The board layout will greatly influencethe RF performance of the CC2530-CC2591EM. TI provides a compact CC2530CC2591 EM reference design that it is highly recommended to follow. The layout, stack-upand schematic for the CC2591 need to be copied exactly to obtain good performance. Notethat the reference design also includes bill of materials with manufacturers and part numbersL102 L10=TI INF inductorVDD13cc2530LA 1RF PANTCC2591 RF NFNPA EN(P1 1)i工工I NA FNP:1HGM ENPO 7)T:1Proper power supply decoupling must be used for optimum performance. In Figure 5.1, onlythe decoupling components for the CC2591 are shown. This is because, in addition todecoupling, the parallel capacitors C11, C101, and C131 together with, L101, L102, TL11TL101 and TL131 also work as RF loads. These therefore ensure the optimal performancefrom the CC2591. C161 decouples the AvDD blAs power.The placement and size of the decoupling components, the power supply filtering and thePCB transmission lines are very important to achieve the best performance Details about theimportance of copying the CC2530-CC2591EM reference design exactly and potentialconsequences of changes are explained in chapter 6The RF input/output of CC2530 is high impedance and differential. The CC2591 includes abalun and a matching network in addition to the PA, LNa and RF switches which makes theinterface to the CC2530 seamless. Only a few components between the CC2530 andCC2591 necessary for RF matching For situation with extreme mismatch(VSWR 6: 1 till 12: 1out-of-band as shown in Figure 6.2) it is recommended to include all the components asshown in Figure 5.1ISTRUMENTSPage 9 of 19SWRA308ANote that the PCB transmission lines that connect the two devices also are part of the RFmatching. It is therefore important to copy the distance between the devices, the transmissionlines and the stack-up of the PCB according to the reference design to ensure optimumperformanceThe network between the CC2591 and the antenna(L111, C112, C111 C113 and L112matches the CC2591 to a 50 2 load and provides filtering to pass regulatory demands. C111also works as a dc-blockR151 is a bias resistor the bias resistor is used to set an accurate bias current for internaluse in the cc2591The TI reference design contains two antenna options. As default, the Sma connector isconnected to the output of CC2591 through a 0 Q2 resistor. This resistor can be soldered offand rotated 90 clockwise in order to connect to the PCB antenna, which is a planar invertedF antenna(PIFA). Note that all testing and characterization has been done using the SMAconnector. The PCB antenna has only been functionally tested by establishing a link betweentwo EMs. Please refer to the antenna selection guide [6] and the Inverted F antenna designnote [7 for further details on the antenna solutionsISTRUMENTSPage 10 of 19SWRA308A

这是一套使用ssm框架开发的图书管理系统，数据库使用的是Mybatis，仅供大家学习交流使用。。。

三维凸包算法的讲解及代码实现，帮助你更快掌握三维凸包算法

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标准指纹数据库，用于人体生物特征识别研究。

This repository contains most of classic deep reinforcement learning algorithms, including - DQN, DDPG, A3C, PPO, TRPO. (More algorithms are still in progress)

微电子电路设计第五版,Richard C. Jaeger, Traveis N. Blalock编著。FIETH EDITIONMICROELECTRONICHM-M- CIRCUIT DESIGNRICHARD C. JAEGERAuburn UniversityTRAVIS N. BLALOCKUniversity of VirginiaMcGrawEducationGrawEducationMICROELECTRONIC CIRCUIT DESIGN. FIFTH EDITIOPublished by McGraw-Hill Education, 2 Penn Plaza, New York, NY 10121 CopyrightC 2016 by McGraw-Hill EducationAll rights reserved. Printed in the United States of America. Previous editions 2011, 2008, and 2004. No part of thispublication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system,without the prior written consent of McGraw-Hill Education, including, but not limited to, in any network or otherelectronic storage or transmission, or broadcast for distance learninSome ancillaries, including electronic and print components, may not be available to customers outside the United StatesThis book is printed on acid-free pape1234567890DOw/DOw1098765ISBN978-0-07-352960-8MHID0-07-352960-5sident Products markets Kurt LVice President, General Manager, Products Markets: Marty Langece President, Content Design Delivery: Kimberly Meriwether DavidManaging director: Thomas TimpGlobal Publisher Raghu srinivasanDirector. Prodrelopment: RoDirector, Digital Content Development: Thomas Scaife, Ph DProduct develoVincent brashMarketing manager: Nick Mc faddenDirector, Content Design Delivery: Linda avenariusProgram meSchillingContent Project Managers: Jane Mohr, Tammy Juran, and Sandra M. SchneeBuyer: Jennifer PickelDesign: Studio Montage, St Louis, MOContent Licensing Specialist: DeAnna DausenerCompositor: MPS LimitedPrinter.R. DonnellAll credits appearing on page or at the end of the book are considered to be an extension of the copyright pageLibrary of Congress Cataloging-in-Publication DataJaeger. Richard cMicroelectronic circuit design/Richard C. Jaeger, Auburn University,Travis N. Blalock, University of Virginia. --Fifth editionpages cmIncludes bibliographical references and indexISBN978-0-07-352960-8(alk. paper)-ISBN0-07-338045-8(alk. paper)d 1. Integrated circuits--Design and construction. 2. Semiconductors--Design and construction. 3. Electronic circuitesign. I. Blalock, Travis N. Il. TitleTK7874.J3332015621.3815-dc232014040020The Internet addresses listed in the text were accurate at the time of publication. The inclusion of a website does not indicatean endorsement by the authors or McGraw-Hill Education, and McGraw-Hill Education does not guarantee the accuracy ofthe information presented at these siteswww.mhhe.comTOTo Joan, my loving wife and life long partnerRichard C. JaegerIn memory of my father, Professor Theron vaughnBlalock, an inspiration to me and to the countlessstudents whom he mentored both in electronicdesign and in life.Travis n blalockBRIEF CONTENTSPreface xxChapter-by-Chapter Summary XXV12 Operational Amplifier Applications 685PART ONE13 Small-Signal Modeling and LinearSOLID-STATE ELECTRONICS AND DEVICESAmplification 77014 Single-Transistor Amplifiers 8411 Introduction to Electronics 32 Solid-State Electronics 4115 Differential Amplifiers and Operational Amplifier3 Solid-state Diodes and Diode circuits 72Design 9524 Field-Effect Transistors 14416 Analog Integrated Circuit Design Techniques 10315 Bipolar Junction Transistors 21517 Amplifier Frequency Response 111318 Transistor Feedback Amplifiers andPART TWOOscillators 1217DIGITAL ELECTRONICSAPPENDICES6 Introduction to Digital Electronics 2837 Complementary MOS (CMOS) Logic Design 359A Standard Discrete Component Values 12918 MOS Memory Circuits 414B Solid-State Device Models and sPIce simulationParameters 12949 Bipolar Logic Circuits 455C TWo-Port Review 1299PART THREIndex 1303ANALOG ELECTRONICS10 Analog Systems and Ideal OperationalAmplifiers 51711 Nonideal Operational Amplifiers and FeedbackAmplifier Stability 587CONTENTSPreface xxCHAPTER 2Chapter-by-Chapter Summary XXVSOLID-STATE ELECTRONICS 41PART ONE2.1 Solid-State Electronic materials 432.2 Covalent bond model 44SOLID-STATE ELECTRONICS2.3 Drift Currents and mobility inAND DEVICES 1Semiconductors 472.3.1 Drift Currents 47CHAPTER 12.3.2 Mobility 48INTRODUCTION TO ELECTRONICS 32.3.3 Velocity Saturation 482.4 Resistivity of Intrinsic Silicon 491.1 A Brief History of Electronics: From2.5 Impurities in Semiconductors 50Vacuum Tubes to Giga-Scale Integration 52.5.1 Donor Impurities in silicon 511.2 Classification of Electronic Signals 82.5.2 Acceptor Impurities in Silicon 511.2.1 Digital signals 92.6 Electron and hole concentrations in1.2.2 Analog Signals 9Doped semiconductors 511.2.3 A/D and D/A Converters--Bridging2.6.1Type Material (ND >NA)52the analog and Digital2.6.2 p-Type Material (N,A>ND)53Domains 102.7 Mobility and Resistivity in Doped1.3 Notational conventions 12Semiconductors 541.4 Problem-Solving Approach 132.8 Diffusion currents 581.5 Important Concepts from Circuit2. 9 Total Current 59Theory 152.10 Energy Band Model 601.5.1 Voltage and current Division 152.10.1 Electron-Hole pair generation in1.5.2 Thevenin and norton circuitan intrinsic semiconductor 60Representations 162.10.2 Energy Band Model for a Doped1.6 Frequency Spectrum of ElectronicSemiconductor 61Signals 212.10.3 Compensated semiconductors 611.7 Amplifiers 222.11 Overview of Integrated circuit1.7.1 Ideal operational amplifiers 23Fabrication 631.7.2 Amplifier Frequency Response 25Summary 661.8 Element Variations in Circuit Design 26Key Terms 671.8.1 Mathematical modeling ofReference 68Tolerances 26Additional Reading 681.8.2 Worst-Case Analysis 27Problems 688.3 Monte Carlo analysis 291.8.4 Temperature Coefficients 32CHAPTER 31.9 Numeric Precision 34SOLID-STATE DIODES AND DIODE CIRCUITS 72Summary 34Key Terms 353.1 The pn Junction Diode 73References 363.1.1 pn Junction Electrostatics 73Additional Reading 363.1.2 nternal diode currents 77Problems 363.2 The i-v Characteristics of the diode 78VIllContents3.3 The Diode Equation: A Mathematica3.15 Full-Wave Bridge Rectification 123Model for the diode 803.16 Rectifier Comparison and Design3.4 Diode Characteristics under reverse, ZeroTradeoffs 124and forward bias 833.17 Dynamic Switching Behavior of the Diode 1283.4.1 Reverse bias 833.18 Photo diodes, solar cells, and3. 4.2 Zero bias 83Light-Emitting Diodes 1293.4.3 Forward Bias 843.18.1 Photo diodes and3.5 Diode Temperature Coefficient 86Photodetectors 1293.6 Diodes under reverse bias 863.18.2 Power Generation from Solar Cells 1303.6.1 Saturation Current in real3.18. 3 Light-Emitting Diodes(LEDs)13Diodes 87Summary 1323.6.2 Reverse Breakdown 89Key Terms 1333.6.3 Diode model for the breakdownReference 134Region 90Additional Reading 1343.7 pn Junction Capacitance 90Problems 1343.7.1 Reverse bias 903.7.2 Forward Bias 91CHAPTER 43.8 Schottky Barrier Diode 933.9 Diode SPICE Model and layout 93FIELD-EFFECT TRANSISTORS 1443.9.1 Diode Layout 944.1 Characteristics of the MOS Capacitor 1453.10 Diode Circuit Analysis 954.1.1 Accumulation Region 1463.10.1 Load-Line Analysis 964.1.2 Depletion Region 1473.10.2 Analysis Using the Mathematical4.1.3 Inversion Region 147Model for the diode 974.2 The nmos transistor 1473.10.3 The Ideal diode model 1014.2.1 Qualitative i-v Behavior of the3.10.4 Constant Voltage Drop Model 103NMOS Transistor 1483.10.5 Model Comparison and4.2.2 Triode Region Characteristics ofDiscussion 104the nmos transistor 1493.11 Multiple-Diode Circuits 1054.2.3 On Resistance 1523.12 Analysis of Diodes Operating in the4.2.4 Transconductance 153Breakdown Region 1084.2.5 Saturation of the i-v3.12.1 Load-Line Analysis 108Characteristics 1543.12.2 Analysis with the Piecewise4.2.6 Mathematical model in theLinear model 108Saturation (Pinch-off)3.12.3 Voltage regulation 109Region 1553.12.4 Analysis Including Zener4.2.7 Transconductance in saturation 156Resistance 1104.2.8 Channel-Length Modulation 1563.12.5 Line and Load Regulation 1114.2.9 Transfer characteristics and3.13 Half-Wave Rectifier Circuits 112Depletion-Mode MosFETs 1573.13.1 Half-Wave Rectifier with resistor4.2.10 Body Effect or SubstrateLoad 112Sensitivity 1593.13.2 Rectifier Filter Capacitor 1134.3 PMOS Transistors 1603.13.3 Half-Wave Rectifier with rc load 1144.4 MOSFET Circuit Symbols 1623. 13.4 Ripple Voltage and Conduction4.5 Capacitances in MOS Transistors 165Interval 1154.5.1 NMOs Transistor Capacitances in3.13.5 Diode Current 117the Triode region 1653.13.6 Surge Current 1194.5.2 Capacitances in the Saturation3.13.7 Peak-Inverse-Voltage(PlV)Rating 119Region 1663.13.8 Diode Power Dissipation 1194.5.3 Capacitances in Cutoff 1663.13.9 Half-Wave Rectifier with Negative4.6 MOSFET Modeling in SPICE 167Output Voltage 1204.7 MOS Transistor Scaling 1683.14 Full-Wave Rectifier Circuits 1224.7.1 Drain Current 1693. 14.1 Full-Wave Rectifier with Negative4.7.2 Gate Capacitance 169Output Voltage 1234.7.3 Circuit and power densities 169ContentsIX4.7.4 Power-Delay Product 1705.3 The pnp Transistor 2234.7.5 Cutoff Frequency 1705.4 Equivalent Circuit Representations for the4.7.6 High Field Limitations 171Transport Models 2254.7.7 The unified mos transistor model5.5 The i-v Characteristics of the bipolarIncluding High Field Limitations 172Transistor 2264.7.8 Subthreshold conduction 1735.5.1 Output Characteristics 2264.8 MOs Transistor Fabrication and layout5.5.2 Transfer characteristics 227Design Rules 1745.6 The Operating Regions of the Bipolar4.8.1 Minimum Feature size andTransistor 227Alignment Tolerance 1745.7 Transport Model Simplifications 2284.8.2 Mos Transistor Layout 1745.7.1 Simplified Model for the Cutoff4.9 Biasing the NMOS Field-EffectRegion 229Transistor 1785.7.2 Model Simplifications for the4.9.1 Why Do We Need Bias? 178Forward-Active Region 2314.9.2 Four-Resistor Biasing 1805.7.3 Diodes in Bipolar Integrated4.9.3 Constant Gate-Source VoltageCircuits 237Bias 1845.7.4 Simplified Model for the4.9.4 Graphical analysis for theReverse-Active Region 238Q-Point 1845.7.5 Modeling Operation in the4.9.5 Analysis Including Body Effect 184Saturation Region 2404.9.6 Analysis Using the Unified5.8 Nonideal Behavior of the bipolarModel 187Transistor 2434.10 Biasing the PMos Field-Effect Transistor 1885.8.1 Junction Breakdown Voltages 2444.11 The junction Field-Effect Transistor5.8.2 Minority-Carrier Transport in theUFET190Base Region 2444.11.1 The JFET With Bias Applied 195.8.3 Base Transit time 2454.11.2 JFET Channel with Drain-Source5.8.4 Diffusion Capacitance 247Bias 1935.8.5 Frequency Dependence of the4.11.3 n-Channel jfet i-v Characteristics 193Common-Emitter current gain 2484.11.4 The p-Channel JFET 1955.8.6 The Early Effect and Early4.11.5 Circuit Symbols and JFET ModelVoltage 248Summary 1955.8.7 Modeling the Early Effect 2494.11.6 JFET Capacitances 1965.8.8 Origin of the Early Effect 2494.12 JFET Modeling in Spice 1965.9 Transconductance 2504.13 Biasing the JFET and Depletion-Mode5.10 Bipolar Technology and sPiCe Model 251MOSFET 1975.10.1 Qualitative Description 251Summary 2005.10.2 SPICE Model Equations 252Key Terms 2025.10.3 High-Performance BipolarReferences 202Transistors 253Problems 2035.11 Practical bias circuits for the bjt 2545.11.1 Four-Resistor bias network 256CHAPTER 55.11.2 Design Objectives for theBIPOLAR JUNCTION TRANSISTORS 215Four-Resistor bias network 2585.11.3 terative Analysis of the5.1 Physical Structure of the BipolarFour-Resistor bias circuit 262Transistor 2165.12 Tolerances in bias circuits 2625.2 The Transport Model for the npn5. 12.1 Worst-Case Analysis 263Transistor 2175. 12.2 Monte Carlo Analysis 2655.2.1 Forward Characteristics 218Summary 2685.2.2 Reverse Characteristics 220Key Terms 2705.2.3 The Complete Transport ModelReferences 270Equations for Arbitrary BiasProblems 271Conditions 221

参考我的博客：http://blog.csdn.net/hongbin_xu/article/details/78988450张正友相机标定完整工程实现，开发环境为（win10+VS2015+OpenCV3.1.0）

Gabor的matlab程序，Gabor滤波是一种不错的特征提取方法，尤其在图像处理应用广泛