Mimics17中文培训手册.pdf
这本培训手册是为了帮助用户顺利地开始Mimics软件的使用而编写的，并不能够代替Materialise公司提 供的培训。 这本培训手册在不同的练习中使用了 Mimics 17.0 的模块，如果没有相关模块的使用权无法完成练习。 请注意: 这本培训手册的使用以熟悉Windows系统操作技能为前提Materialise software目录Mmcs培训手册公告BBBB暑 NeAA日品EB园 8NaNANOEN冒品 RaRE曹BB总BBBB即总 98D6NNENnAMms0筒介Mimics模块导入图像5练1.导人如imap图像6练习2:导入DCOM图像…导航&项目管理器,77是BBB品B日BB日B品 0n00EDdD自2B日出BBBB自BBB目B自BBB国BBB即D日BBD国国练习,导航2仟务1.一键导航、放大缩小、平移…12任务2.快捷键的使用…13任务3帮助文档练习2.项日管理器,…14任务1.熟悉项目管理器的使用.14任务2.视窗操作.14任务3.体渲染15/测量工具9练习1.测量工只20任务1.距离测量.20任务2.角度测量任务3.测量的导出着国面21任务4.密度测量.21练习2.剖面线练习3.评注22基本阈值分割&三维模型操作,,25练习1.能部的分割.26任务1阈值分割(使用剖面线任务2.计算三维模型27任务3.区城增长28练习2.分离动脉…网值法任务1.阙值分割(使用剖面线)和区域增长30任务3.计算三维模型.…练习3.分离动脉∥33动态区域增长法33任务1.动态区域增长…33练习4.三维导航团道任务1.一键导航、敖大缩小、移、旋转……35任务2.使用快捷方式进行导疽.36练↓5.从骨盆上分离脊推37练习6.三维工具……40练习7.提取膝关#443D性套索功能任务1:使用3D磁性套索提取胫骨导出功能www.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise software练习1.导出切层50任务1.导出DCOM任务2.导出BMP.50任务3.导出电影.50练习2.导出S752高级分割53练习1.分离脑组织…任务1.修剪感兴趣的区域…….54任务2.形态学操作:消蚀.….55任务3.在三维视下编辑mask.57任务4.形态学操作:膨胀…57仟务5.千动编辑59任务6.多层编辑…60MedcADB即即BB身总BDB即原总自D即国B国即即DBB即 anDOng90且BBBD63练习1.通过多义线拟合球体练习2.通过多义线拟合表面66任务1.拟合股骨主干的表面任务2.拟合大转了的表面67练习3动脉中心线69任务1计算中心线9任务2.中心线测量70仟务3.中心线末端切面∴71任务4.分支分组仟务5.对控制点的操作…72于术模拟…74练习1.使用多义下面切割练习2.植入体评价练习3调整入体的位练习4评价骨量179FEA…,,n,,,n,n82练习1.股骨的网格优化83任务1.打开网格优化器…83任务2.股骨的几何简化83任务3.检查网格.……,85任务4优化三均片质量任冬5.生成体网格……∴88练小2.赋材质……90练3.并流形装配.97任务1.创建非流形装配91仟务2.优化网格93任务3.创建体K格.95仟务4.分离非流型装配以及导出网格文件恭喜您98Mimics nnovation Suite用户俱乐部98www.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise softwareMmis简介Mimics是一个迕接二维图像数据(CT,MRl,工业扫描数据.)和三维工程学应用的图像处理工具。应用领域包括:解剖学测量、三维分析、有限元分析(FEA)、客制化植入体或装置设计、加法制造(也被称为维打印)以及手术计划和模拟通过使用 Mimics的图像分割方法,用户能够从医学数据中选择特点的感兴趣区域,将结果计算成精确的三维模型。Mimics的功能模垬为用户提供了其它应用领域的接口。这意味着 Mimics的功能可以方便的根据用户的需要进行组合。另外, Mimics是 Mimics innovation suite的一部分,这一套装也包括了3mabc0。在套装中, Mimics被用来生成精确的三维模型,之后3-ma加被用来在解剖学模型的基础上进行设计和网格操作。因比3-ma极大稈度的扩展了 Mimics在基于解剖数据的工程学方面的应用的可能性Mimics被广泛的应用在骨科、颌面外科以及心血管行业的学术及商业硏究领域Mimics的主要优势:Mimics界面友好容易掌握。快遮的分割工具(基于阈值和轮廓)和精确的三维计算保证了快捷的取道精细的三维模型Mimics在|sO环境下开发,只有CE和FDA市场认证Mimics基于市场要求持续开发,每年有两个版本的更新。当 Mimics和3- matic被联合应用时,用户可以直接在STL文件的基础上进行设计和网格操作尤需逆向工程。这使用户可以:基于解剖数据改进植入体o设计客制化的植入体和手术导板● Mimics的开发商 Materialise是创新软件和加法制造技术的世界领跑者。www.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise softwarem/模块Mimics包括多个模块。下方的图片给出了基础模块与功能模块之间的链接,以及)要的应用领域。ImportMimics @Innovation SuiteExportMimicsFEAMedCADSurgicalRP-sliceSimulationCAD3- matic②MATLAB BImpartsStatisticestanPoint cloudAnalysisEngineeringPoint cloudManufacturing(RP/CAMywww.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise software导入图像这一章的练习公帮助您了解如何导入bmp图像以夂对图像尺寸进行修改如何自动导入D|COM数据■确认图像方向注意Mimics不仅支持 Dicom格式数据,而且能够直接导入扫描原始数据。这些数据可以通过硬盈、光盘或磁盘导入。 Mimics也支持BMP,JPEG以及TFF格式文件的导入。源文件可以通过在 importwizard的第一步选择, force manual import"的方式手动导入在开始之前保证您已经安装了培训数据 Training Data2011.eXe、头影测量数据库以及牵引器数据库。您可以在培训光盘中找到这些安装程序。www.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise software练习1.导入bma图像从主工具栏中选择 new project wizardSelet the media or files tha contain the images x irpotDICOM Input Application (D-AFavoritesDriversIrldyeRuuLaMedDataA.UDotascts山 extra datasetsImportTEST. RTTMAPD DICOM簧 Add : o feveritearget folder: 3: SUpportRobert Atwooda mercer aw inport show Import logCarTEl2.浏览 Training Data文件夹( CMed DataTraining Data),选择 BITMAP文件夹。点击Mex3.在 Image properties窗口标示出扫描分辨率。像素大小为256μm,层距为4mm。然后选择Mexwww.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise softwareNew project w zardMcnary ncad=d (conmprc33cc/uncomprcaacd): 128 Mb/256 Mb Mcrory availzbc: 20E2 Mbv7023277sia+S vL_/62341/b_akIa +000.8(-J00 bmpv70234770ad+00160-00v76234776axi+00200-00.mv76237681+002C00bm画7.8C- 00.hmnv762]4768i5+00360-00.brpv/6234baxa+004-.mpv7624776ai+048C-hrmnvi70234770ad+002C-00uv76234776ai110056C00.bmv7623763x8+0060000mp76)3x776xia+0-0mp画w70234770did+008C-00Jmp烟v762]4768+00720-00mp1A1,∩ nTEr nn LSorting orde- custom-15775sh?informatonK701∞Y7z40mnkmPatent name n/a□ Forcc sotropi: samplingrebate n/o4.在下个窗口 Edit images,您可以涠过调节图像周围的线框的大小来对该项目进行修剪。dit imag esf vol maco/caac #l ixel mappingMin X 30x MaK< X 51Min Y 115MinZ o px Msx Z 511 psInput: 512* 512 x :12 Output 182x 213x 51?100, JUUUOUPlxel sze:1.fUlllt:1Skip mages: JInput: 402? Outut: 402x 21Jx512www.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米Materialise software5.在这个窗口,您也可以编辑像素映射图的属性。完成编辑后,点击Mex6.在方向窗口标示出图像的方向。点击OK打开 Mimics项目,您就可以开始进行图像分割了!Check orientationverify if the proposed or entatior is correctDizor mage orien ation: xXXCurrent orientationR吕T0BA□Risht-dick on an orientation character to chance it.OK Cancel Hepwww.materialise.comMaterialise China- 1803, No 800, DongfangRoad-Shanghai-Chinamimics@materialise.com.cnMaterialisedriving your innovations米
- 2020-12-11下载
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PCI Specification 3.0_PCI 3.0 规范
PCI 3.0 规范,英文原版。PCI Local Bus Specification Revision 3.0PCI LOCAL BUS SPECIFICATION, REV.3.0ContentsPREFACESPECIFICATION.……13INCORPORATION OF ENGINEERING CHANGE NOTICES (ECNS)1查音音鲁垂音音13DOCUMENT CONVENTIONS.………14l. INTRODUCTION…151.1. SPECIFICATION CONTENTS······151.2. MOTIVATION……151.3. PCI LOCAL BUS APPLICATIONS1. 4. PCI LOCAL BUS OVERVIEW171.5. PCI LOCAL BUS FEATURES AND BENEFITS……181. 6. ADMINISTRATION…………………202. SIGNAL DEFINITION m...mn.. 212.1 SIGNAL TYPE DEFINITION222.2. PIN FUNCTIONAL GROUPS..…………222.2.1. System Pins……,…,…,,…,…232.2.2. Address and data pins242.2.3. Interface Control Pins........................252.2.4. Arbitration Pins(Bus Masters Only)272.2.5. Error Reporting Pins....垂看d。普音看鲁D指音着音,。音音自。音音音。音自垂272.2.6. Interrupt Pins( Optional)……282.2.7. Additional signals312.2.8.64- Bit bus extension pins( Optiona)…,,……………………………332.2.9. TAG/Boundary scan Pins(Optional).......342. 10. System Management Bus Interface Pins(Optional)352. 3. SIDEBAND SIGNALS362. 4. CENTRAL RESOURCE FUNCTIONS.····:·····.·············363. BUS OPERATION373.1 BUS COMMANDS373.1. Command definition373. 1.2. Command Usage rules393.2. PCI PROTOCOL FUNDAMENTALS423.2.1. Basic Transfer Control····:············.················433.2.2. Addressing.............143.2.3. Byle lane and Byte enable usage……563.2.4. Bus Driving and Turnaround非音垂垂·非573.2.5. Transaction Ordering and posting….583. 2.6. Combining Merging, and Collapsing。。音垂。音62PCI LOCAL BUS SPECIFICATION, REV.3.03.3. BUS TRANSACTIONS……643.3.1. Read transaction……………653.3.2. Write transaction3.3.3. Transaction termination.………….673.4. ARBItRAtION音垂3.4.1. Arbitration Signaling protoco1..…………………893.4.2. Fast Back-to-Back Transactions. .........................................................93.4.3. Arbitration Parking………………………………………93.5 LATENCY953.5.1. Target Latency…….953.5.2. Master Data latency……….….…….,….….…..……..….,983.5.3. Memory Write Maximum Completion Time limit3.5.4. Arbitration Latency3.6. OTHER BUS OPERATIONS……·。垂,音着垂。着音D。。着。D音着音垂。音着D音非非音垂音非·非1103.6.1. Device selection…....…,103.6.2. Special cycle...........3.6.3. IDSEL Stepping…………,,…,…,,…,,…,,,,,………,…1133.6.4. Interrupt acknowledg3.7. ERROR FUNCTIONS春音·。音垂1153.7.. Parity ger1153.7.2. Parity Checking...........………,163.7.3. Address parity errors…...…,…163.7.4.Error Reporting…17173.7.5. Delayed Transactions and Data Parity Errors.......... 203.7.6. Error Recovery.............,213. 8. 64-BIT BUS EXTENSION1233.8.1. Determining bus Width during System initialization.…….…,1263.9.64- BIT ADDRESSING…..…………………………………………1273.10SPECIAL DESIGN CONSIDERATIONS.1304. ELECTRICAL SPECIFICATION.. m.m.9.1374.1. OVERVIEW…1374.1.1. Transition Road Map……1374.1.2. Dynamic vs Static Drive specificalion…1384.2. COMPONENT SPECIFICATION.……,………………,1…………………1394.2.1. 5V Signaling environment1404.2.2. 33V Signaling environment鲁鲁·垂垂1464.2.3. Timing specification1504.2.4.1determinate Inputs and metastable作,…………1554.2.5. Vendor provided specification..,..…,.…………….………17564.2.6. Pinout recommendation157PCI LOCAL BUS SPECIFICATION. REV.3.04.3. SYSTEM BOARD SPECIFICATION.………1584.3.1. Clock skew,…………………1584.3.2.R··1584.3.3. Pull-ups:····.················:·····…1614.3.4Power1634.3.5. System Timing Budget. ...........1644.3.6. Physical requirements............………674.3.7. Connector Pin assignments……/6844. ADD-IN CARD SPECIFICATION1714.4.1.Add- in Card Pin Assignment..,.,.,………………,1714.4.2. Power Requirements….,.,.,.,.,.,.,,.….,764.4.3. Physical requirements.........1785. MECHANICAL SPECIFICATION1815.1. OVERVIEW1812. ADD-IN CARD PHYSICAL DIMENSIONS AND TOLERANCES...........1825.3. CONNECTOR PHYSICAL DESCRIPTION…………………1954. CONNECTOR PHYSICAL REQUIREMENTS. ...............................2055. CONNECTOR PERFORMANCE SPECIFICATION……………,…2066. SYSTEM BOARD IMPLEMENTATION……………2076. CONFIGURATION SPACEb●看●鲁D鲁0e●2136. 1. CONFIGURATION SPACE ORGANIZATION音垂垂D·垂看垂…2136.2. CONFIGURATION SPACE FUNCTIONS .......................2166.2.1. Device ldentification鲁垂垂2166.2.2. Device Control鲁着鲁D垂2176.2.3. Device status2196. 2.4. Miscellaneous registers·······:········:···:·:··:·:······:··············4······:····2216.2.5. Base addresses……………………….22463. PCI EXPANSION ROMS2286.4. VITAL PRODUCT DATA.2296.5. DEVICE DRIVERS2296.6. SYSTEM RESET.…………………………2306.7. CAPABILITIES LIST2308. MESSAGE SIGNALED INTERRUPTS ...................................................................2316.8.1. MSI Capability Structure..............2326.8.2. MSl-X Capability and Table structures……………….……..2386.8.3. MSI and Msi-X Operation2467. 66 MHZ PCI SPECIFICATION2557. 1. INTRODUCTION2557.2. SCOPE7. 3. DEVICE IMPI TION CONSIDERATIONS7.3.1. Configuration space.......2557. 4. AGENT ARCHITECTURE256PCI LOCAL BUS SPECIFICATION, REV.3.07.5. PROTOCOL.……2567.5.1.66 MHZ ENABLE(M66EN) Pin definition.…………,………,,2567.52Latency..-..-.-2577.6. ELECTRICAL SPECIFICATION……………2577.6.. Overview·.·······.··2577.6.2. Transition roadmap to 66 MHz PCI··········.2577.6.3. Signaling Environment.......... 2587.6.4. Timing specification.……2597.6.5. Vendor provided specification. 26.57.6.6. Recommendations·.·························:············:······:········.:··········2657.7. SYSTEM BOARD SPECIFICATION.………,…,……………2667.7.1. Clock Uncertainty ......2667.7.2. Reset2677.7.3. Pullups..2677.7.4. Power..······.·.·::·····布鲁····音D鲁番。是。音垂看····非D∴2677.7.5. System Timing Budget7.7.6. Physical requirements2687.7.7. Connector Pin assi! nments…..,.,.,..,.,.,..,.,.,2697.8. ADD-IN CARD SPECIFICATIONS春音·。音垂2698. SYSTEM SUPPORT FOR SMBUSn2718. 1. SMBUS SYSTEM REQUIREMENTS2718.1.1. Power………278. 2. Physical and Logical sMBi27l8.1.3. Bus connectivit2728.1.4. Master and slave support....….….…..…..…..,2738.1.5. Addressing and Configuration2738.1.6.Ele2748.1.7. SMBus behavior on Pcl reset.........................2748.2.ADD- IN CARD SMBUS REQUIREMENTS…………2758.2.7Connection2758.2.2. Master and Slave Support...,.…..…….…,...….,2758.2.3. Addressing and Configuration……,…,…,……,…,…,…,….….…..….,2758. 2. 4. Power2758. 2.5. Electrical.········.····························275A. SPECIAL CYCLE MESSAGES●鲁●e鲁277A 1. MESSAGE ENCODINGS277A,2. USE OF SPECIFIC ENCODINGS ................................................277B. STATE MACHINES279B. 1. TARGET LOCK MACHINE·;.···.:..···:...···:··.·:····281B.2. MASTER SEQUENCER MACHINE283B 3. MASTER6PCI LOCAL BUS SPECIFICATION. REV.3.0C. OPERATING RULES289C 1. WHEN SIGNALS ARE STABLE..·····.:·.·.::···:·;289C.2. MASTER SIGNALS…音·。·看290C.3. TARGET SIGNALS…291C.4. DATA PHASES…292C.5. ARBITRATION.……………………………………292C.6. LATeNCY······:“·······293C.7. DEVICE SELECTION……………,……………………………293C 8. PARITY垂垂垂D·垂294D. CLASS CODESD 1. BASE CLASS OOH...w.w...296D 2. BASE CLASS OlH296D. 3. BASE CLASS O2H··297D 4. BASE CLASS O3H297D.5. BASE CLASS04H.………………………298D. 6. BASE CLASS OSH298D.7. BASE CLASS06H...………….…………………299D 8. BASE CLASS OZH,300D 9. BASE CLASS OSH.301D.10. BASE CLASS C9H.……………………………………………….301D.11. BASE CLASS OAH.…………………302D 12. BASE CLASS OBH302D. 13. BASE CLASS OCH303D.14. BASE CLASS ODH….…304D. 15. BASE CLASS OEH304D. 16. BASE CLASS OFH·····.····;····:·;:·······304D.17. BASE CLASS JOH.……………………………………………1305D, 18. BASE CLASS 11H305E. SYSTEM TRANSACTION ORDERINGE.I. PRODUCER- CONSUMER ORDERING MODEL308E. 2. SUMMARY OF PCI ORDERING REQUIREMENTS310E.3. ORDERING OF REQUESTS........................................311E.4. ORDERING OF DELAYED TRANSACTIONS…………312E.5. DELAYED TRANSACTIONS AND LOCK#.317E.6. ERROR CONDⅠ TIONS……318. EXCLUSIVE ACCESSES..m.msn0..319F.1. EXCLUSIVE ACCESSES ON PCIF 2. STARTING AN EXCLUSIVE ACCESS321F.3. CONTINUING AN EXCLUSIVE ACCESS323F 4. ACCESSING A LOCKED AGENT324F 5. COMPLETING AN EXCLUSIVE ACCESS325F. 6. COMPLETE BUS LOCK ......................................................................325IO SPACE ADDRESS DECODING FOR LEGACY DEVICES..9.... 327PCI LOCAL BUS SPECIFICATION, REV.3.0CAPABILITY IDS。,0329I. VITAL PRODUCT DATA331VPD FORMAT3I.2COMPATIBILITY……………………………334L.3. VPD DEFINITIONS3341.3.1. VPD Large and small resource Data Tags......·D垂看3341.3.2. VPD Example…3378PCI LOCAL BUS SPECIFICATION. REV.3.0FiquresFIGURE -I: PCI LOCAL BUS APPLICATIONS春DFIGURE 1-2: PCI SYSTEM BLOCK DIAGRAM17FIGURE2-1: PCI PIN LIST.…………..…………21figure 3-1: ADDRESS PHASE FORMATS OF CONFIGURATION TRANSACTIONS...... 48Figure 3-2: LAYOUT OF CONFIG ADDRESS REGISTER, ..............................................50Figure 3-3: HOST BRIDGE TRANSLATION FOR TYPE O CONFIGURATION TRANSACTIONSADDRESS PHASE51FIGURE3-4: CONFIGURATION READ…………156FIGURE3-5: BASIC READ OPERATION………………………65FIGURE 3-6: BASIC WRITE OPERATION66FIGure 3-7: MASTER INITIATED TERMINATION........................ 68FIGURE3-8: MASTER- ABORT TERMINATION…………69Figure 3-9: RETRY. ..........................................................................................................73FiGure 3-10: DISCONNECT WITH DATA. ........................74FiGure 3-11: MASTER COMPLETION TERMINATION:·:····:··.·4····.···…75FiGURE 3-12: DISCONNECT-1 WITHOUT DATA TERMINATION·····76Figure 3-13: DISCONNECT-2 WITHOUT DATA TERMINATION76FiGure 3-14: TARGET-ABORT…177figure 3-15: BASIC ARBITRATIONFIGuRE 3-16: ARBITRATION FOR BACK-TO-BACK ACCESS…94FiGurE 3-17: DEVSEL# AsSERTION·····:···.·:··110Figure 3-1 8: IDSEL STEPPING114FiGure 3-19: INTERRUPT ACKNOWLEDGE CYCLE. ...................................................114FIGURE3-20: PARITY OPERATION………116FIGuRE 3-21: 64-BIT READ REQUEST WITH 64-BIT TRANSFER125FIGURE 3-22: 64-BIT WRITE REQUEST WITH 32-BIT TRANSFER..........126FIGURE 3-23 64-BIT DUAL ADDRESS READ CYCLE129FIGURE 4-1: ADD-IN CARD CONNECTORS...........................138FIGURE4-2:V/ICURⅤ ES FOR5 V SIGNALING.…………………143FIGURE 4-3: MAXIMUM AC WAVEFORMS FOR 5V SiGnaling145FIGURE 4-4: V/I CURVES FOR 3.3V SIGNALING148FIGURE4-5:MAⅹ IMUM AC WAⅤ EFORMS FOR3.3ⅴ SIGNALING………150FIGURE 4-6: CLOCK WAVEFORMS151FIGURE 4-7: OUTPUT TIMING MEASUREMENT CONDITIONS.··4·:······.·154FIGURE4-8: INPUT TIMING MEASUREMENT CONDITIONS…………154FIGURE 4-9: SUGGESTED PINOUT FOR POFP PCI COMPONENT···“···:.···.····:·········157FIGURE4-10: CLOCK SKEW DIAGRAM………158FIGURE 4-1: RESET TIMING16lFIGURE4-12: MEASUREMENT OF TPROP,3.3 VOLT SIGNALING……………166FIGURE 5-1: PCI RAW ADD-IN CARD(3.3V, 32-BIT).183FIGURE 5-2: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 32-BIT)..........184FIGURE 5-3: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 64-BIT)....185FIGURE 5-4: PCI RAW LOW PROFILE ADD-IN CARD(3.3V, 32-BIT)..........186PCI LOCAL BUS SPECIFICATION, REV.3.0FIGURE5-5: PCI ADD-Ⅰ N CARD EDGE CONNECTOR BEⅤEL……187FIGURE56: PCI ADD-IN CARD ASSEMBLY(3.3V)……………………………88FIGURE 5-7: LOW PROFILE PCI ADD-IN CARD ASSEMBLY 3.3V)189FIGURE 5-8: PCI STANDARD BRACKET………190FIGuRE 5-9: PCI LOW PROFILE BRACKET191FIGURE 5-10: PCI STANDARD RETAINER···192FIGURE5-11: IO WINDOW HEIGHT∴………………193FIGURE 5-12: ADD-IN CARD INSTALLATION WITH LARGE IO CONNECTOR.......194FIGURE 5-13: 32-BIT CONNECTOR196FIGURE 5-14: 3.3V/32-BIT CONNECTOR LAYOUT RECOMMENDATION. ........................197FIGURE5-15:3.3V/64-BIT CONNECTOR198FIGURE 5-16: 3.3V/64-BIT CONNECTOR LAYOUT RECOMMENDATION 199FIGURE 5-17: 3.3V/32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES2(垂D·。垂,音着垂。着音D。。着。D音着音垂。音着音FIGURE 5-18: 3.3V/64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES….201FIGURE5-19: UNIVERSAL 32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES………………………………202FIGURE 5-20: UNIVERSAL 64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES203FIGURE5-21:PCⅠADD- IN CARD EDGE CONNECTOR CONTACTS……204FIGURE5-22: CONNECTOR CONTACT DETAIL………………205FIGURE 5-23: PCI CONNECTOR LOCATION ON SYSTEM BOARD208FIGURE5-24:32- BIT PCI RISER CONNECTOR……209FIGURE 5-25: 32-BIT/3.3V PCI RISER CONNECTOR FOOTPRINT210FIGURE 5-26: 64-BIT/3.3V PCI RISER CONNECTOR211FIGuRE5-27:64-BI/3.3ⅴ PCI RISER CONNECTOR FOOTPRINT∴………212FIGURE 6-1: TYPE OOH CONFIGURATION SPACE HEADER215FIGURE 6-2: COMMAND REGISTER LAYOUT217FIGURE6-3: STATUS REGISTER LAYOUT……………………………219FIGURE 6-4: BIST REGISTER LAYOUT222FIGURE 6-5: BASE ADDRESS REGISTER FOR MEMORY........... 225FIGURE 6-6: BASE ADDRESS REGISTER FOR L/O225鲁着D音看FIGURE 6-7: EXPANSION ROM BASE ADDRESS REGISTER LAYOUT.....,..... 228FIGURE6-8: EXAMPLE CAPABILITIES LIST…….231FIGURE6-9: MSI CAPABILITY STRUCTURES…..……233FIGURE 6-10: MSI-X CAPABILITY STRUCTURE238FIGurE 6-11: MSI-X TABLE STRUCTURE翻音。音239FIGurE 6-12: MSI-X PBA STRUCTURE…239FIGURE 7-1: 33 MHZ PCI VS 66 MHZ PCI TIMING······:··················257FIGURE7-2:3.3 V CLOCK WAVEFORM.…………259FIGURE 7-3: OUTPUT TIMING MEASUREMENT CONDITIONS263FIGURE -4: INPUT TIMING MEASUREMENT CONDITIONS263FIGURE75:TvAL(MAX) RISING EDGE…………264FIGURE 7-6: TVAL(MAX) FALLING EDGE·265FIGURE77:TVAL(MIN) AND SLEW RATE……26510
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