MATLAB潮流计算程序

主要是基于删除信道下的LDPC码的编译码的实现 在MATLAB环境中运行实现

红白机的超级玛丽全部素材，包括所有图片（地图瓦片、人物、怪物、特效等，已全部对齐）、音乐、音效

关于雷达信号处理的教程，学习的好资料共分为五个部分，与大家分享

The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group

【实例简介】亚像素质心定位算法 二值化质心定位算法 加权二值化质心定位算法

XILINX FPGA数字信号处理权威指南 从HDL到模型和C的描述pdf高清版本

web前端课程设计，jquery+js+css+html，实现基本前台所有界面，

可以自己参考一下

排列熵的matlab程序 PE的计算程序，绝对好用

传输矩阵法，一般用来研究周期性分层介质中的传输特性。对于分层媒质的微分方程在特定条件下的解，最简单便捷的方式便是使用传输矩阵。传输矩阵法就是用矩阵的形式来描述电磁波在多层介质中的传播情况，在每一层介质中传播过程中的运动规律满足的Maxwell 方程组。