Delplhi_UniGUI 适合大多数管理软件开发的框架源代码

太阳能路灯系统能耗较大,所需配套的蓄电池容量也较大,造成成本过高,影响了太阳能路灯系统的实际工程推广。针对此问题,设计出了一种新型的节能照明控制器,与传统路灯控制器相比,可使能耗大大降低。该控制器控制功能易于实现,运行可靠,可使照明工程既满足功能性的要求,又能实现最大限度的节能。

对指纹图像进行预处理，指纹特征提取，指纹匹配；预处理中，采用图像的归一化，图像的分割，二值化处理，图像增强和细化方法。

PCI 3.0 规范,英文原版。PCI Local Bus Specification Revision 3.0PCI LOCAL BUS SPECIFICATION, REV.3.0ContentsPREFACESPECIFICATION.……13INCORPORATION OF ENGINEERING CHANGE NOTICES (ECNS)1查音音鲁垂音音13DOCUMENT CONVENTIONS.………14l. INTRODUCTION…151.1. SPECIFICATION CONTENTS······151.2. MOTIVATION……151.3. PCI LOCAL BUS APPLICATIONS1. 4. PCI LOCAL BUS OVERVIEW171.5. PCI LOCAL BUS FEATURES AND BENEFITS……181. 6. ADMINISTRATION…………………202. SIGNAL DEFINITION m...mn.. 212.1 SIGNAL TYPE DEFINITION222.2. PIN FUNCTIONAL GROUPS..…………222.2.1. System Pins……,…,…,,…,…232.2.2. Address and data pins242.2.3. Interface Control Pins........................252.2.4. Arbitration Pins(Bus Masters Only)272.2.5. Error Reporting Pins....垂看d。普音看鲁D指音着音,。音音自。音音音。音自垂272.2.6. Interrupt Pins( Optional)……282.2.7. Additional signals312.2.8.64- Bit bus extension pins( Optiona)…,,……………………………332.2.9. TAG/Boundary scan Pins(Optional).......342. 10. System Management Bus Interface Pins(Optional)352. 3. SIDEBAND SIGNALS362. 4. CENTRAL RESOURCE FUNCTIONS.····:·····.·············363. BUS OPERATION373.1 BUS COMMANDS373.1. Command definition373. 1.2. Command Usage rules393.2. PCI PROTOCOL FUNDAMENTALS423.2.1. Basic Transfer Control····:············.················433.2.2. Addressing.............143.2.3. Byle lane and Byte enable usage……563.2.4. Bus Driving and Turnaround非音垂垂·非573.2.5. Transaction Ordering and posting….583. 2.6. Combining Merging, and Collapsing。。音垂。音62PCI LOCAL BUS SPECIFICATION, REV.3.03.3. BUS TRANSACTIONS……643.3.1. Read transaction……………653.3.2. Write transaction3.3.3. Transaction termination.………….673.4. ARBItRAtION音垂3.4.1. Arbitration Signaling protoco1..…………………893.4.2. Fast Back-to-Back Transactions. .........................................................93.4.3. Arbitration Parking………………………………………93.5 LATENCY953.5.1. Target Latency…….953.5.2. Master Data latency……….….…….,….….…..……..….,983.5.3. Memory Write Maximum Completion Time limit3.5.4. Arbitration Latency3.6. OTHER BUS OPERATIONS……·。垂,音着垂。着音D。。着。D音着音垂。音着D音非非音垂音非·非1103.6.1. Device selection…....…,103.6.2. Special cycle...........3.6.3. IDSEL Stepping…………,,…,…,,…,,…,,,,,………,…1133.6.4. Interrupt acknowledg3.7. ERROR FUNCTIONS春音·。音垂1153.7.. Parity ger1153.7.2. Parity Checking...........………,163.7.3. Address parity errors…...…,…163.7.4.Error Reporting…17173.7.5. Delayed Transactions and Data Parity Errors.......... 203.7.6. Error Recovery.............,213. 8. 64-BIT BUS EXTENSION1233.8.1. Determining bus Width during System initialization.…….…,1263.9.64- BIT ADDRESSING…..…………………………………………1273.10SPECIAL DESIGN CONSIDERATIONS.1304. ELECTRICAL SPECIFICATION.. m.m.9.1374.1. OVERVIEW…1374.1.1. Transition Road Map……1374.1.2. Dynamic vs Static Drive specificalion…1384.2. COMPONENT SPECIFICATION.……,………………,1…………………1394.2.1. 5V Signaling environment1404.2.2. 33V Signaling environment鲁鲁·垂垂1464.2.3. Timing specification1504.2.4.1determinate Inputs and metastable作,…………1554.2.5. Vendor provided specification..,..…,.…………….………17564.2.6. Pinout recommendation157PCI LOCAL BUS SPECIFICATION. REV.3.04.3. SYSTEM BOARD SPECIFICATION.………1584.3.1. Clock skew,…………………1584.3.2.R··1584.3.3. Pull-ups:····.················:·····…1614.3.4Power1634.3.5. System Timing Budget. ...........1644.3.6. Physical requirements............………674.3.7. Connector Pin assignments……/6844. ADD-IN CARD SPECIFICATION1714.4.1.Add- in Card Pin Assignment..,.,.,………………,1714.4.2. Power Requirements….,.,.,.,.,.,.,,.….,764.4.3. Physical requirements.........1785. MECHANICAL SPECIFICATION1815.1. OVERVIEW1812. ADD-IN CARD PHYSICAL DIMENSIONS AND TOLERANCES...........1825.3. CONNECTOR PHYSICAL DESCRIPTION…………………1954. CONNECTOR PHYSICAL REQUIREMENTS. ...............................2055. CONNECTOR PERFORMANCE SPECIFICATION……………,…2066. SYSTEM BOARD IMPLEMENTATION……………2076. CONFIGURATION SPACEb●看●鲁D鲁0e●2136. 1. CONFIGURATION SPACE ORGANIZATION音垂垂D·垂看垂…2136.2. CONFIGURATION SPACE FUNCTIONS .......................2166.2.1. Device ldentification鲁垂垂2166.2.2. Device Control鲁着鲁D垂2176.2.3. Device status2196. 2.4. Miscellaneous registers·······:········:···:·:··:·:······:··············4······:····2216.2.5. Base addresses……………………….22463. PCI EXPANSION ROMS2286.4. VITAL PRODUCT DATA.2296.5. DEVICE DRIVERS2296.6. SYSTEM RESET.…………………………2306.7. CAPABILITIES LIST2308. MESSAGE SIGNALED INTERRUPTS ...................................................................2316.8.1. MSI Capability Structure..............2326.8.2. MSl-X Capability and Table structures……………….……..2386.8.3. MSI and Msi-X Operation2467. 66 MHZ PCI SPECIFICATION2557. 1. INTRODUCTION2557.2. SCOPE7. 3. DEVICE IMPI TION CONSIDERATIONS7.3.1. Configuration space.......2557. 4. AGENT ARCHITECTURE256PCI LOCAL BUS SPECIFICATION, REV.3.07.5. PROTOCOL.……2567.5.1.66 MHZ ENABLE(M66EN) Pin definition.…………,………,,2567.52Latency..-..-.-2577.6. ELECTRICAL SPECIFICATION……………2577.6.. Overview·.·······.··2577.6.2. Transition roadmap to 66 MHz PCI··········.2577.6.3. Signaling Environment.......... 2587.6.4. Timing specification.……2597.6.5. Vendor provided specification. 26.57.6.6. Recommendations·.·························:············:······:········.:··········2657.7. SYSTEM BOARD SPECIFICATION.………,…,……………2667.7.1. Clock Uncertainty ......2667.7.2. Reset2677.7.3. Pullups..2677.7.4. Power..······.·.·::·····布鲁····音D鲁番。是。音垂看····非D∴2677.7.5. System Timing Budget7.7.6. Physical requirements2687.7.7. Connector Pin assi! nments…..,.,.,..,.,.,..,.,.,2697.8. ADD-IN CARD SPECIFICATIONS春音·。音垂2698. SYSTEM SUPPORT FOR SMBUSn2718. 1. SMBUS SYSTEM REQUIREMENTS2718.1.1. Power………278. 2. Physical and Logical sMBi27l8.1.3. Bus connectivit2728.1.4. Master and slave support....….….…..…..…..,2738.1.5. Addressing and Configuration2738.1.6.Ele2748.1.7. SMBus behavior on Pcl reset.........................2748.2.ADD- IN CARD SMBUS REQUIREMENTS…………2758.2.7Connection2758.2.2. Master and Slave Support...,.…..…….…,...….,2758.2.3. Addressing and Configuration……,…,…,……,…,…,…,….….…..….,2758. 2. 4. Power2758. 2.5. Electrical.········.····························275A. SPECIAL CYCLE MESSAGES●鲁●e鲁277A 1. MESSAGE ENCODINGS277A,2. USE OF SPECIFIC ENCODINGS ................................................277B. STATE MACHINES279B. 1. TARGET LOCK MACHINE·;.···.:..···:...···:··.·:····281B.2. MASTER SEQUENCER MACHINE283B 3. MASTER6PCI LOCAL BUS SPECIFICATION. REV.3.0C. OPERATING RULES289C 1. WHEN SIGNALS ARE STABLE..·····.:·.·.::···:·;289C.2. MASTER SIGNALS…音·。·看290C.3. TARGET SIGNALS…291C.4. DATA PHASES…292C.5. ARBITRATION.……………………………………292C.6. LATeNCY······:“·······293C.7. DEVICE SELECTION……………,……………………………293C 8. PARITY垂垂垂D·垂294D. CLASS CODESD 1. BASE CLASS OOH...w.w...296D 2. BASE CLASS OlH296D. 3. BASE CLASS O2H··297D 4. BASE CLASS O3H297D.5. BASE CLASS04H.………………………298D. 6. BASE CLASS OSH298D.7. BASE CLASS06H...………….…………………299D 8. BASE CLASS OZH,300D 9. BASE CLASS OSH.301D.10. BASE CLASS C9H.……………………………………………….301D.11. BASE CLASS OAH.…………………302D 12. BASE CLASS OBH302D. 13. BASE CLASS OCH303D.14. BASE CLASS ODH….…304D. 15. BASE CLASS OEH304D. 16. BASE CLASS OFH·····.····;····:·;:·······304D.17. BASE CLASS JOH.……………………………………………1305D, 18. BASE CLASS 11H305E. SYSTEM TRANSACTION ORDERINGE.I. PRODUCER- CONSUMER ORDERING MODEL308E. 2. SUMMARY OF PCI ORDERING REQUIREMENTS310E.3. ORDERING OF REQUESTS........................................311E.4. ORDERING OF DELAYED TRANSACTIONS…………312E.5. DELAYED TRANSACTIONS AND LOCK#.317E.6. ERROR CONDⅠ TIONS……318. EXCLUSIVE ACCESSES..m.msn0..319F.1. EXCLUSIVE ACCESSES ON PCIF 2. STARTING AN EXCLUSIVE ACCESS321F.3. CONTINUING AN EXCLUSIVE ACCESS323F 4. ACCESSING A LOCKED AGENT324F 5. COMPLETING AN EXCLUSIVE ACCESS325F. 6. COMPLETE BUS LOCK ......................................................................325IO SPACE ADDRESS DECODING FOR LEGACY DEVICES..9.... 327PCI LOCAL BUS SPECIFICATION, REV.3.0CAPABILITY IDS。,0329I. VITAL PRODUCT DATA331VPD FORMAT3I.2COMPATIBILITY……………………………334L.3. VPD DEFINITIONS3341.3.1. VPD Large and small resource Data Tags......·D垂看3341.3.2. VPD Example…3378PCI LOCAL BUS SPECIFICATION. REV.3.0FiquresFIGURE -I: PCI LOCAL BUS APPLICATIONS春DFIGURE 1-2: PCI SYSTEM BLOCK DIAGRAM17FIGURE2-1: PCI PIN LIST.…………..…………21figure 3-1: ADDRESS PHASE FORMATS OF CONFIGURATION TRANSACTIONS...... 48Figure 3-2: LAYOUT OF CONFIG ADDRESS REGISTER, ..............................................50Figure 3-3: HOST BRIDGE TRANSLATION FOR TYPE O CONFIGURATION TRANSACTIONSADDRESS PHASE51FIGURE3-4: CONFIGURATION READ…………156FIGURE3-5: BASIC READ OPERATION………………………65FIGURE 3-6: BASIC WRITE OPERATION66FIGure 3-7: MASTER INITIATED TERMINATION........................ 68FIGURE3-8: MASTER- ABORT TERMINATION…………69Figure 3-9: RETRY. ..........................................................................................................73FiGure 3-10: DISCONNECT WITH DATA. ........................74FiGure 3-11: MASTER COMPLETION TERMINATION:·:····:··.·4····.···…75FiGURE 3-12: DISCONNECT-1 WITHOUT DATA TERMINATION·····76Figure 3-13: DISCONNECT-2 WITHOUT DATA TERMINATION76FiGure 3-14: TARGET-ABORT…177figure 3-15: BASIC ARBITRATIONFIGuRE 3-16: ARBITRATION FOR BACK-TO-BACK ACCESS…94FiGurE 3-17: DEVSEL# AsSERTION·····:···.·:··110Figure 3-1 8: IDSEL STEPPING114FiGure 3-19: INTERRUPT ACKNOWLEDGE CYCLE. ...................................................114FIGURE3-20: PARITY OPERATION………116FIGuRE 3-21: 64-BIT READ REQUEST WITH 64-BIT TRANSFER125FIGURE 3-22: 64-BIT WRITE REQUEST WITH 32-BIT TRANSFER..........126FIGURE 3-23 64-BIT DUAL ADDRESS READ CYCLE129FIGURE 4-1: ADD-IN CARD CONNECTORS...........................138FIGURE4-2:V/ICURⅤ ES FOR5 V SIGNALING.…………………143FIGURE 4-3: MAXIMUM AC WAVEFORMS FOR 5V SiGnaling145FIGURE 4-4: V/I CURVES FOR 3.3V SIGNALING148FIGURE4-5:MAⅹ IMUM AC WAⅤ EFORMS FOR3.3ⅴ SIGNALING………150FIGURE 4-6: CLOCK WAVEFORMS151FIGURE 4-7: OUTPUT TIMING MEASUREMENT CONDITIONS.··4·:······.·154FIGURE4-8: INPUT TIMING MEASUREMENT CONDITIONS…………154FIGURE 4-9: SUGGESTED PINOUT FOR POFP PCI COMPONENT···“···:.···.····:·········157FIGURE4-10: CLOCK SKEW DIAGRAM………158FIGURE 4-1: RESET TIMING16lFIGURE4-12: MEASUREMENT OF TPROP,3.3 VOLT SIGNALING……………166FIGURE 5-1: PCI RAW ADD-IN CARD(3.3V, 32-BIT).183FIGURE 5-2: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 32-BIT)..........184FIGURE 5-3: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 64-BIT)....185FIGURE 5-4: PCI RAW LOW PROFILE ADD-IN CARD(3.3V, 32-BIT)..........186PCI LOCAL BUS SPECIFICATION, REV.3.0FIGURE5-5: PCI ADD-Ⅰ N CARD EDGE CONNECTOR BEⅤEL……187FIGURE56: PCI ADD-IN CARD ASSEMBLY(3.3V)……………………………88FIGURE 5-7: LOW PROFILE PCI ADD-IN CARD ASSEMBLY 3.3V)189FIGURE 5-8: PCI STANDARD BRACKET………190FIGuRE 5-9: PCI LOW PROFILE BRACKET191FIGURE 5-10: PCI STANDARD RETAINER···192FIGURE5-11: IO WINDOW HEIGHT∴………………193FIGURE 5-12: ADD-IN CARD INSTALLATION WITH LARGE IO CONNECTOR.......194FIGURE 5-13: 32-BIT CONNECTOR196FIGURE 5-14: 3.3V/32-BIT CONNECTOR LAYOUT RECOMMENDATION. ........................197FIGURE5-15:3.3V/64-BIT CONNECTOR198FIGURE 5-16: 3.3V/64-BIT CONNECTOR LAYOUT RECOMMENDATION 199FIGURE 5-17: 3.3V/32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES2(垂D·。垂,音着垂。着音D。。着。D音着音垂。音着音FIGURE 5-18: 3.3V/64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES….201FIGURE5-19: UNIVERSAL 32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES………………………………202FIGURE 5-20: UNIVERSAL 64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES203FIGURE5-21:PCⅠADD- IN CARD EDGE CONNECTOR CONTACTS……204FIGURE5-22: CONNECTOR CONTACT DETAIL………………205FIGURE 5-23: PCI CONNECTOR LOCATION ON SYSTEM BOARD208FIGURE5-24:32- BIT PCI RISER CONNECTOR……209FIGURE 5-25: 32-BIT/3.3V PCI RISER CONNECTOR FOOTPRINT210FIGURE 5-26: 64-BIT/3.3V PCI RISER CONNECTOR211FIGuRE5-27:64-BI/3.3ⅴ PCI RISER CONNECTOR FOOTPRINT∴………212FIGURE 6-1: TYPE OOH CONFIGURATION SPACE HEADER215FIGURE 6-2: COMMAND REGISTER LAYOUT217FIGURE6-3: STATUS REGISTER LAYOUT……………………………219FIGURE 6-4: BIST REGISTER LAYOUT222FIGURE 6-5: BASE ADDRESS REGISTER FOR MEMORY........... 225FIGURE 6-6: BASE ADDRESS REGISTER FOR L/O225鲁着D音看FIGURE 6-7: EXPANSION ROM BASE ADDRESS REGISTER LAYOUT.....,..... 228FIGURE6-8: EXAMPLE CAPABILITIES LIST…….231FIGURE6-9: MSI CAPABILITY STRUCTURES…..……233FIGURE 6-10: MSI-X CAPABILITY STRUCTURE238FIGurE 6-11: MSI-X TABLE STRUCTURE翻音。音239FIGurE 6-12: MSI-X PBA STRUCTURE…239FIGURE 7-1: 33 MHZ PCI VS 66 MHZ PCI TIMING······:··················257FIGURE7-2:3.3 V CLOCK WAVEFORM.…………259FIGURE 7-3: OUTPUT TIMING MEASUREMENT CONDITIONS263FIGURE -4: INPUT TIMING MEASUREMENT CONDITIONS263FIGURE75:TvAL(MAX) RISING EDGE…………264FIGURE 7-6: TVAL(MAX) FALLING EDGE·265FIGURE77:TVAL(MIN) AND SLEW RATE……26510

该程序实现键盘对四相步进电机的控制，12864显示，利用ST188传感器测量步进电机转速。

基于MatlabSimulink数字基带传输系统仿真课程设计

插值法图像超分辨率重建，matlab代码，可以交流学习一下

内含数据库、jar包，登录 增删改查(分页) 上传文件 后台审核代码等等

详细的讲解了SVPWM的过程，及其仿真，很适合初学者或(37)即磁链空间矢量可以等效为电压空间矢量的积分,如果能够控制电压空间矢量的轨迹为如式(3.4)所示的圆形矢量,那么磁链空间矢量的轨迹也为圆形。这样,电动机旋转磁场的轨迹问题就可以转化为电压空间矢量的运动轨迹问题。进一步分析,由式(3.3)(3.5)(3.7)可以得到公式(3.8)∫-+yy(38)对电压积分,利用等式两边相等的原则有(39)其中,v为电机磁链的幅值,即为理想磁链圆的半径。y当供电电源保持压频比不变时,磁链圆半径v是固定的。在 SVPWM控制技术中,是取以y为半径的磁链圆为基准圆的。32逆变器电压的输出模式图32给出了电压源型PWM逆变器—异步电动机示意图14。昇步电动机定子绕组YY图3.2PWM逆变器电路(1~6为GBT)对于180°导电型的逆变器来说,三个桥臂的六个开关器件共可以形成8种开关模式。用分别标记三个桥臂的状态,规定当上桥臂器件导通时桥臂状态为1,下桥臂导通时桥臂状态为0,这样逆变器的八种开关模式对应八个电压空间矢量,其中为直流侧电压在逆变器的八种开关模式中,有六种开关模式对应非零电压空间矢量,矢量的幅值为一;有两种开关模式对应的电压矢量幅值为零,称为零矢量。当零矢量作用于电机时不形成磁链矢量;而当非零矢量作用于电机时,会在电机中形成相应的磁链矢量。对于每一个电压空间矢量,可由图32求出各相的电压值,再将各相的电压值代入式(3.3),可以求得电压空间矢量的位置。下面以开关状态)=(、0、0)为例,即开关导通,其余关断。逆变电路的形式可以变为B相和C相并连后再和A相串连的形式,易得将其数值代入式(33),可得采用同样的方法可以得到如表31所示的逆变器空间电压矢量。表31逆变器的不同开关状态对应的空间矢量表相电压矢量表达式定子电压开关状态(Us大小为空间矢量A相B相C相0000000101001110010111100由于 SVPWM控制的是逆变器的开关状态,在实际分析逆变器一电动机系统时,可以通过分析逆变器输出的电压空间矢量来分析电机定子电压的空间矢量,下面给出证明。设逆变器输出的三相电压为、,由图3.2可求出加到电机定子上的相电压为(310)其中,为电机定子绕组星接时中点0相对于逆变器直流侧点的电位。电机定子电压空间矢量为(311)而由三角函数运算知++因此,逆变器输出的电压空间矢量为(312)由式(3.12)可知,在PWM逆变器一电动机系统中,对电机定子电压空间矢量的分析可以转化为对逆变器输出电压空间矢量的分析。这时,在求解表3.1时,可以直接利用逆变器输出的电压合成得到,即A,B,C三相输出电压值只有一和-—两个值。当逆变器输出某一电压空间矢量时,电机的磁链空间矢量可表示为y =y3.13)其中,W为初始磁链空间矢量;△为的作用时间。当为某一非零电压矢量时,磁链空间矢量y从初始位置出发,沿对应的电压空间矢量方向,以为半径进行旋转运动,当为一零电压矢量时,W=y,磁链空间矢量的运动受到抑制。因此合理地选择六个非零矢量的施加次序和作用时间,可使磁链空间矢量顺时针或逆时针旋转形成一定形状的磁链轨迹。在电机控制当中尽量使磁链轨迹逼近正多边形或圆形。同时,在两个非零矢量之间按照一定的原则,比如开关次数最少,插入一个或多个零矢量并合理选择零矢量的作用时间,就能调节ψ的运动速度。33SWPM的具体实现方法在实际应用中,应当利用 SVPWM自身的特点找到控制规律,避开复杂的数学在线运算,从而较为简单的实现开关控制,本节将给出实现 SVPWM的具体方法。根据3.2节中给出的不同开关状态组合可以得到如图33的电压空间矢量图C图3.3 SVPWM矢量、扇区图通常在矢量控制的系统当中,根据控制策略,进行适当的巫标变换,可以给出两相静止坐标系即(a,B)坐标系电压空间矢量的分量,g,这时就可以进行 SVPWM的控制,具体要做以下三部分的工作如何选择电压矢量。2.如何确定每个电压矢量作用的时间。3.确定每个电压矢量的作用顺序3.3.1电压空间矢量的空间位置这里需要引入扇区的概念,将整个平面分为六个扇区。如图3.3所示,每个扇区包含两个基本矢量,落在某个扇区的电压空间矢量将由扇区边界的两个基本电压空间矢量进行合成。在确定扇区时,引入三个决策变量A,B,C。根据给出的待合成的空间矢量的两个分量,p来决定A,B,C的取值,有以下关系式所在扇区的位置为当N取不同的值对应的扇区位置如图3.3所示,这样给定一个空间电压矢量就可以确定其所在的扇区。33.2电压空间矢量的合成扇区确定之后,就可以利用扇区边界上的两个基本矢量合成所需的矢量在合成过程中应当使得两个基本矢量的合成效果接近于期望矢量的效果。于是采用伏秒平衡的原则,以图3.3所示的第Ⅲ扇区为例,以a尸轴为基准,将两个基本矢量向aB轴上投影,应当有轴:=||+尸轴其中,为对应电压矢量作用的时间(=),为采样周期,通常为PW的调制周期。且|=||=-。求解上面两式可以得到这两个基本矢量的作用时间如式3.14(314)通过上面的方法即可以确定基本矢量的作用时间,当需要合成的矢量位于各个不同的扇区时都存在如上的运算。通过对每个扇区基本矢量动作时间的求解不难发现它们都是一些基本时间的组合。所以给出几个基本的时间变量x,Y,Z。定义√(315)通过计算可以得到在每个扇区内的基本矢量动作时间,(由于五段和七段式的实现方法不同,所以这里没有考虑矢量的动作顺序,仅按照逆时针方向)。设每个刷区的两个基本矢量动作的时间为于是可以得到矢量动作时间表3,2表3.2的对应关系表扇区ⅣV在实际的应用中当给定的电压值太大时会出现过调制的情况,即+>。此情况出现时,还要对上述计算出来的电压矢量的作用时间进行调整,具体方法如式3.16所示。(316)即为调整后的动作时间。在一个P啊M周期内除了非零电压矢量的作用,还要有零电压矢量的作用,零电压矢量包括对于这两个矢量的作用时间,以及开关的动作顺序,取决于采用的SPwM是五段式还是七段式,3.3节将对这两种PWM形式进行详细的介绍3.4 SVPWM的硬件实现和软件实现TI公司的TM320LF2407A系列的DSP内部有硬件来实现 SVPWM,由于每个PWM周期被分为五段,因此也被称为五段式的 SVPWM。在每个PWM调制周期内,开关状态有五种,且关于周期中心对称。而七段式的SvPM在每个PWM调制周期内有七种开关状态,需要运用软件进行实现,因此也被称为 SVPWM的软件实现。需要注意的是,无论哪种方法,所遵循的基本原则是开关动作次数最少,每个开关在一个周期内最多动作两次。3.4.1五段式 SVPWM对于五段式的 SVPWM,只在PMM周期的中间插入零矢量,具体采用哪一个由硬件根据旋转方向和开关动作次数最少的原则自行决定。例如在第Ⅲ扇区内,如果旋转方向为逆时针时针,则先动作,后动作以此类推,动作时间可以直接采用表3.2中的数据即可,然后选择零矢量(硬件决定)即可使开关次数最少。对于五段式PWM而言,零矢量作用的时间可以表示为:根据上述的配置原则,在每个扇区内开关动作的示意图如图34所示202ⅣV/1Ⅵ图34每个扇区内的开关动作示意图每个TMS320LF2407A的事件管理器EV模块都具有十分简化的电压空间矢量PWM波形产生的硬件电路。编程时只需进行如下的配置2●设置 ACTRX寄存器用来定义比较输出引脚的输出方式,决定高电平还是低电平有效,正反转,所在扇区等。●设置COMC0Nx寄存器来使能比较操作和空间矢量PWM方式,并且把 CMPRX的重装条件设置为下溢●将通用定时器1或2,4或5设置成连续增/诚计数模式,并启动定时器。然后给据在两相静止(a6)坐标系下输入到电机的电压空间矢量,分解为,确定如下的参数●所期望的矢量所在的扇区。根据 SVPWM的调制周期计算出两个基本的空间矢量和零矢量作用的时间

基于C#的波形显示控件的实现源码计算机技术的飞速发展使得其在自动化系统中的应用日益增强。大量监控、图像数据显示软件活跃在自动化工业及自动化教学领域。同时，软件系统的日益复杂化使得模块化开发变得尤为重要。本课题所设计的基于C#的波形显示控件就可在微软.NET平台下进行代码功能重用，达到模块化开发和快速开发的目的，使得程序员能够集中精力设计软件的具体业务流程，而不必担心波形呈现的问题。本文先介绍了.NET平台下用户控件开发的基本方法，以及用C#描述的GDI+图形开发技术，然后提出一种基于C#的波形显示控件的设计思路，并对波形坐标值转换、坐标标尺、工具栏、局部放大等具体的设计细节进行详细解析

Matlab写的区域生长图像分割程序。%区域生长算法:regionfunction LabelImage=region(image,seed,Threshold,maxv)%image:输入图像%seed：种子点坐标堆栈%threshold：用邻域近似生长规则的阈值%maxv：所有生长的像素的范围小于maxv% LabelImage:输出的标记图像，其中每个像素所述区域标记为rn[seedNum,tem]=size(seed);%seedNum为种子个数[Width,Height]=size(image);LabelImage=zeros(Width,Height);