索尼 imx274 datesheet
imx274 datesheet，可以对接Hi3519V101，4K，分享一下SONYIMX274LQC-CAbsolute Maximum RatingsItemSymbolRatingsUnitSupply voltage(Analog)1ADD0.3to+3.3VSupply voltage(Digital 1)-0.5to+2.0Supply voltage(Digital 2)DDD20.5to+3.3VInput voltage(Digital)0.3toV。Dp+0.3VOutput voltage(Digital)-0.3toVD2+0.3Guaranteed operating temperature TOPR-30to+75°CStorage guarantee temperatureTSTG30to+80CPerformance guarantee temperature TsPEC10to+60Recommended Operating ConditionsItemSymbolRatingSupply voltage(Analog)VADD2.8±0.1Supply voltage(Digital 1)1.2±0.1VSupply voltage(Digital 2)1.8±0.1Input voltage(Digital)-0.1 to Vopp2+0.11 VADD: VDDSUB, VoDHCM, VoDHPX, VDDHDA, VDDHCP (2.8V power supplyVDDD1: VDDLCN, VDDLSC1 to 2, VDDLPA, VDDLPL1, VoDLPL2 to 3. VDDLIF (1.2V power supply)VDDD2: VDDMIO, VDDMIF (1.8V power supply)SONYIMX274LQC-CUSE RESTRICTION NOTICEThis USE RESTRIC TION NOTICE (Notice )is for customers who are considering or currently using theimage sensor products("Products")set forth in this specifications book. Sony Corporation Sony")mayat any time, modify this Notice which will be available to you in the latest specifications book for theProducts. You should abide by the latest version of this Notice. If a Sony subsidiary or distributor has itsown use restriction notice on the Products, such a use restriction notice will additionally apply betweerou and the subsidiary or distributor. You should consult a sales representative of the subsidiary ordistributor of sony on such a use restriction notice when you consider using the ProductsUse restrictionsThe Products are intended for incorporation into such general electronic equipment as office productscommunication products, measurement products, and home electronics products in accordance withthe terms and conditions set forth in this specifications book and otherwise notified by sony from timeYou should not use the Products for critical applications which may pose a life-or injury-threateningrisk or are highly likely to cause significant property damage in the event of failure of the products. Youshould consult your sales representative beforehand when you consider using the products for suchcritical applications. In addition, you should not use the products in weapon or military equipmentSony disclaims and does not assume any liability and damages arising out of misuse improper usemodification, use of the Products for the above-mentioned critical applications, weapon and militaryequipment, or any deviation from the requirements set forth in this specifications booklesign for SafetySony is making continuous efforts to further improve the quality and reliability of the products howeverfailure of a certain percentage of the products is inevitable. Therefore, you should take sufficient careto ensure the sate design of your products such as component redundancy, anti-contlagration featuresand features to prevent mIs-operation in order to avoid accidents resulting in injury or death fire orother social damage as a result of such failureExport ControlIf the Products are controlled items under the export control laws or regulations of various countriesapproval may be required for the export of the products under the said laws or regulationsYou should be responsible for compliance with the said laws or regulationsNo License Impliedo The technical information shown in this specifications book is for your reference purposes only. theavailability of this specifications book shall not be construed as giving any indication that sony and itscensors will license any intellectual property rights in such information by any implication or otherwiseSony will not assume responsibility for any problems in connection with your use of such information orfor any infringement of third-party rights due to the same. It is therefore your sole legal and financialresponsibility to resolve any such problems and infringementGoverning lawThis notice shall be governed by and construed in accordance with the laws of Japan, without referenceto principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relatingto this Notice shall be submitted to the exclusive jurisdiction of the Tokyo district Court in Japan as thecourt of first instanceOther Applicable Terms and ConditionsThe terms and conditions in the Sony additional specifications, which will be made available to you whenyou order the Products, shall also be applicable to your use of the Products as well as to thisspecifications book. You should review those terms and conditions when you consider purchasingand/or using the ProductsGeneral-0.0. 8SONYIMX274LQC-CContentsDescription---FeaturesDevice structureOptical Black Array and Readout Scan Direction---Absolute Maximum Ratings2233Recommended Operating Conditions---------------USE RESTRICTION NOTICEContentsOptical CePin Configuration------------------Pin description-------------------------458899hen using csl-2When using Sub-LVDS1210 Equivalent Circuit Diagram15Peripheral Circuit19System OutlineWhen using CSl-2When using Sub-LVDSElectrical Characteristics when using cs1-2--------------------------m---------------------------------21. DC Characteristics(CS1-2)a.8..4Current Consumption and Gain Variable Range(CSl-2Supply Voltage and l/O Voltage(CS1-2)2. AC Characteristics(CS1-222INCK, XCLR(CSl-2)22XHS, XVS(Output)(CSI-2)22IC Communication (CSI-2)23DMCKP/DMCKN, DMO(CSl-2Electrical Characteristics When Using Sub-LVDs-------------------m--------------------------1. DC Characteristics(Sub-LVDs)……Current Consumption and gain Variable Range sub-LVDS24Supply Voltage and l/o Voltage(Sub-LVDSLVDS Output DC Characteristics(Sub-LVDS2. AC Characteristics ( Sub-LVDS).........25INCK, XCLR, XVS(input), XHS (input)(Sub-LVDS25Serial Communication(Sub-LVDS)Sub-LVDS Output(Sub-LVDS)26Spectral Sensitivity Characteristics(CS1-2 and Sub-LVDS27Image Sensor Characteristics(CSl-2 and Sub-LVDS)-281. Zone Definition of Image Sensor Characteristics28mage Sensor Characteristics Measurement Method(CSl-2 and Sub-LVDS)1. Measurement conditions2. Color Coding of this Image Sensor and Readout..293. Definition of Standard Imaging Conditions29Setting Registers Using I"C Communication(When Using CSl-2Description of Setting Registers When Using I C communication31Pin Connection of Serial Communication Operation Specifications When Using I"C CommunicationRegister Communication Timing When Using I-C Communication12C Communication Protocol32Register Write and Read33Single Read from Random Location33Single read from current location; iidaiaii:;aaaa“Sequential Read Starting from Random LocationSequential Read Starting from Current Location34Single Write to Random Location35Sequential Write Starting from Random Location35Register Value Reflection Timing to Output Data(CSl-2)36SONYIMX274LQC-CSetting Registers Using Serial Communication (When Using Sub-LVDS)----------------37Setting Registers Using Serial Communication(Sub-LVDS).37Register Value Reflection Timing to Output Data( Sub-LVDS38Register Map…391. Description of Register2. Register Setting for Each Readout Drive Modeeadout Drive Modes( csl-2 and Sub-LVDS)---------------------551. Readout drive modes552. Relationship between Arithmetic Processing and the Number of Output bits in Each Readout Drive ModeImage Data Output Format When Using CSI-2--------------------------58Frame Format (CSI-2)58Frame Structure(CSl-258Embedded Data Line(CSl-2)59CSl-2 serial Output Setting(CSl-2)MIPI Transmitter(CSl-2)62Detailed Specification of Each Mode(CSl-2)---------------631. Horizontal/ Vertical Operation Period in Each Readout Drive Mode(CSl-22. Frame Rate Adjustment(CSl-23. Image Data Output Format CSl-265Vertical Arbitrary Cropping Function(CSl-2)-69Horizontal Arbitrary Cropping Function(CSl-272Electronic Shutter Timing When Using CSI-2------741. SHR, SVR, SMD Setting When Using CSl-2741-1. SHR, SVR Setting(CSl-2)741-2. Electronic Shutter Drive Mode(Csl-2)752. Integration Time in Each Readout Drive Mode and Mode Changes When Using CSl-2762-1. Integration Time in Each Readout Drive Mode(CSl-2762-2. Operation when Changing the Readout Drive Mode(CSl-2772-3. Low Power Consumption Drive in Integration Time When Using Roll ing Shutter Operation(CSl-2)78Image Data Output Format When Using Sub-LVDS--791. Sync Signals and Data Output Timing(Sub-LVDS)““792. Output Range of LVDS Output Data(Sub-LVDS)Detailed Specification of Each Mode(Sub-LVDS)删mHorizontal/Vertical Operation Period in Each Readout Drive Mode(sub-LVDs)..........2. Frame Rate Adjus咖ment(Sub-LVDS)……3. Image Data Output Format ( Sub-LVDS)Vertical Arbitrary Cropping(Sub-LVDS)Horizontal arbitrary cropping function(Sub-LVDS)----m94Electronic Shutter Timing When Using Sub-LVDS961. SHR, SVR Setting(Sub-LVDS)...962. SVR Operation (Sub-LVDS3. Electronic Shutter Drive Mode( Sub-LVDS)974. Integration Time in Each Readout Drive Mode and mode changes When Using Sub-LVDS984-1. Integration Time in Each Readout Drive Mode(Sub-LVDS984-2. Operation when Changing the Readout Drive Mode(Sub-LVDS994-3. Recommended Global Reset Shutter Operation Sequence(Sub-LVDS)1004-4. Interruptive Mode Change(Sub-LVDS4-5. Low Power Consumption Drive in Exposure Time (Sub-LVDS)…102Power-on/off Sequence when using CSI-2---1031. Power-on Sequence(CS2)……1032. Slew Rate Limitation of Power-on Sequence( CSI-21033. Power-off Sequence(CSl-2104Standby cancel sequence when using csl-2--------------------------105Power-on/off Sequence when using Sub-LVDS1161. Power-on Sequence(Sub-LVDS)1062. Slew Rate Limitation of Power-on Sequence(Sub-LVDS).........1063. Power-off Sequence(Sub-LVDS)107Standby Cancel Sequence(Sub-LVDs)------------108SONYIMX274LQC-CSpot Pixel specifications--109Spot Pixel Zone Definition109Notice on White Pixels SpecificationsMeasurement Method for Spot Pixels1111. Black or white pixels at high light1112. White pixels in the dark.3. Black pixels at signal saturated111Spot Pixel Pattern Specifications----------------m---------------------------------------------------112Stain Specifications---113Stain Zone definition113Stain Measurement method.113Relation between Image height and target Cra-----Marking---------mm---------------115Notes on Handling116Package outline ---118List of Trademark Logos and Definition Statements-------------119SONYIMX274LQC-COptical Center(Top View)Package outline10.70±0.1mmPKG lpinM1A1Optical centerM1010See page TBD Package Outl ine" for detailsOptical CenterPin ConfigurationBottom View)lpin index6666δ画δ尚画○●Bottom viewQ§③¤¤意○○○○○○○○10○o⑦A b CE F GMPin configurationSONYIMX274LQC-CPin DescriptionWhen using CS1-2Pin descriptionState inSymbolOADRemarks(CS|-2Standby modeLeave openA2TEST4ATest(No connectionA3VDDHDa Power a Analog power supply (2.8V)A4VDD SUB PowerAnalog power supply(2.8VA5VDDLSC1PowerD Digital power supply(1.2v)A6VssLSC1GNDDDigital GND(1.2V)A7VDDLPL3 Power D Digital power supply (1.2 V)A8VDDLIFowerDigital power supply(1.2v)Leave openB1TEST5ATest(No connectionB2ssHDA GND A Analog GND (2.8V)B3BIASRESResister connectionB4/BGRCapacitor connectionB5GNDD Digital GND (1B6XCLRReset pulse inputB7VssLPL3GNDDigital GND (1.2VB8 VsSLIF1 GND D Digital GND (1.2V)B9DMO4NDigital MiPl outputLow LevelData lane 4connectionB10DMO4P。DDigital MIPl outputLow LevelData lane 4connectionC1TESt3TestLeave open(No connectionC2XCECannect to 1.8 V power supplyLeave openC3TEST1D(No connectionC4TEST2estLeave open(No connectionC5VDDLPAPowerDDigital power supply(1.2v)C6 VDDLPL2 Power D Digital power supply (1.2V)C7 VssLPL2 GND D Digital GND(1.2V)c9DMO2NDigital MIPl outputLow LevelData lane 2connectionData lane 2C10DMO2PDigital MIPl outputLow LevelconnectionD1XHSDDDDHorizontal sync signal outputIf unused xHsleave openD2SDOlest outputLow Leve/ Leave openNo connectionVertical sync signal outpuf unusedⅩVSDleave openD9DMCKND Digital MIPl outputLow LevelClock laneconnectionD10DMCKPDigital MIPl outputLow levelClock LaneconnectionE1SCLDDDc communication clock inputC communication dataE2SDAOinput/outputSONYIMX274LQC-CPinPin descriptionSymbolADState inRemarksNoCS-2Stand by modeE3VSSLCBGNDDigital GND(1.2 V)E8VssLlF2GNDDigital GND(1.2 V)E9DMO1NE10DMO1POFVDDLSC2 PowerF2VssLSC3 PowerDDDDDDADData lane 1Digital MIPl outputLow LevelconnectionData lane 1Digital MIPI outputLow LevelconnectionDigital power supply (1.2 V)Digital power supply (1.2 v)F3VopHCMPowerAnalog power supply(2.8 V)F8INCKInput clockDMO3NDigital MIPl outputData lane 3Low LevelconnectionF10 DMO3PData lane 3Digital MIPI outputLow LevelconnectionG3VssHCPGNDAAnalog GND (2.8V)G8VssLSC2 GND D Digital GND(1.2V)G9VssMIF2 GNDD Digital GND (1.8VG10VoDMIFPowerDDigital power supply (1.8V)H1VDDLCN GND D Digital GND(1.2V)VsSLCNGNDDigital GND (1.2 VH3VopHCPPowerAnalog power supply(2.8VDLO2P( Pin for Sub-LVDS)Leave open(No connectionH9DLO2M000(Pin for Sub-LVDS)Leave open(No connectiH10DLOOP(Pin for Sub-LVDS)Leave open(No connection)VssHPX3 GND AAnalog GND(2.8 V)J3VoDHPXPowerDLO3PADDDAADDAnalog power supply(2.8 V)(Pin for Sub-LVDS)Leave open(No connectionDLO3MO00(Pin for Sub-LVDS)Leave open(No connection)J10DLOOMD(Pin for Sub-LVDS)eave open(No connection)K2VssLPL 1GNDDDigital GND(1.2V)K3 VDDLPL1 Power D Digital power supply(1.2V)K4VoDMIO Power D Digital power supply(1.8V)K5DLO1M(Pin for Sub-LVDS)Leave open(No connectionDLCKM0b「(Pin for Sub-LVDS)Leave open(No connection)Leave openK7DLCKPD(Pin for Sub-LVDS(No connectionLeave openK8DLO9PD(Pin for Sub-LVDS)(No connectionLeave openK9DLO9M(Pin for Sub-LVDS)(No connectionK10DLO5P(Pin for Sub-LVDS)Leave openNo connection
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AD9361中文资料
AD9361中文资料，内容讲述了9361的使用，希望对射频开发者有用，AD9361规格除非另有说明,电气特性在 VDD GPO=33V, VDD INTERFACE=18V,所有其他VDDx引脚=1.3V,T=25°C下测得。表1参数符号最小值典型值最大值件测试条件/注释接收器,一般中心频率706000增益最小值最大值74.5800MH73.02300 MHZ(RX1A, RX2A)72.02300 MHz (RX1 B, RX1CRX2B, RX2C)65.55500 MHZ( RX1A, RX2A)增益步进接收信号强度指示器档位dB准确度dB接收器,800MHz噪声系数最大RX增益三阶输入交调载点IIP318dBrn最大RX增益二阶输入交周载点lP2最大RX增益本振(LO泄漏122dBmRX前端输入正交增益误差0.2%相位误差度调制精度(EVM)192MHz参考时钟输入S10巛1至RX2隔离R×1A至RX2A,RX1C至RX2CX1B至RX2B55RX2至RX1隔离RX2A至RX1A,RX2C至RX1CRX2B至RX1B接收器,2.4GHz噪声系数最大RX增益三阶输入交调载点lP314dBm最大RX增益阶输入父调载点lIP 2d bm最大RX增益本振(LO泄漏110dBm接收器前端输入正交增益误差相位误差0.2度调制精度(∈VM)4240MHz参考时钟输入5110RX1至RX2隔离RX1A至RXZA,RX1C至RX2CRX1B至RX2BRX2至RX1隔离RX2A至RX1A,RX2C至RX1CRX2B至RX1BRev. D Page 3 of 36AD9361参数符号最小值典型值最大值件测试条件注释接收器:55GHz噪声系数NF38最大RX增益三阶输入交调载点lP3d Bm最大RX增益二阶输入交调载点lP2dBm最人RX增益本振LO泄漏dBmx前端输入正交增益误差0.2相位误差度调制精度(EVM)40MHz参考时钟针对RF频率合成器内部加倍)输入51RX1A至RX2A隔离RXA至RX1A隔离5dB发射器一一般中心频率000z功率控制范围dB功率控制分辨率0.25发射器:800MHz输出S2最大输出功率dBm1MH信号音509负载)调制精度(EVM)192MHz参考时钟三阶输出交调载点OIP3dBm载波泄漏dBc0dB衰减40dB衰减本底噪声-157dBm/Hz90MHz偏移隔离1至TX2TX2至T×150dB发射器.24GHz输出SdB最大输出功率7.5dBm1MHz信号音(50Ω负载)调制精度(VM)dB40MHZ参考时钟三阶输出交调载点OIP319dbm载波泄漏0dB衰减3240dB衰减本底噪声156dBm/H290MHz偏移隔离TX1至TX2TX2至TX1dB发射器,5.5GHz输出S最大输出功率6.5dBm|7M信号音50负载)调制精度(EvM)3640MHz参考时钟(针对RF频率合成器内部加倍)三阶输出交调载点OIP317d Bm载波泄漏dBo0dB衰减40dB衰减本底噪声151dBm/Hz90MHz偏移隔离TX1至TX2TX2至TX150Rev. d Page 4 of 36AD9361参数1符号最小值典型值最大值件测试条件注释TX监控器输人(X_MON1,最大输入电平dBm动态范围准确度dBLO频率合成器O频率阶跃2.4 GHz. 40 MHz参考时钟积分相位噪声800 MHZrm100Hz至100MHz,3072MHz参考时钟(针对RF频率合成器内部加倍)24 GHz0.37rm100Hz至100MHz,40MHz参考时钟5.5 GHzrms100Hz至100MHz,40MHz参考时钟(针对R频率合成器内部加倍)参考时钟( REF CLKREF CLK要么为 XTALPXTALN引脚的输入要么为直接连接XTALN引脚的线路输入频率范围50品振输入外部振荡器信号电平Vpp|交流耦合外部振荡器辅助转换器ADO分辨度位输入电压最小值最大值VDDAIP3 BB-005DAO分辨度位输出电压最小值最大值VDD GPO-03输出电流mA数字规格(MOS)逻辑输入输人电压高VDD INTERFACE XO.8VDD INTERFACE低VDD INTERFACE×02V输入电流低+10逻辑输输出电压局VDD INTERFACE XO. 8低VDD_INTERFACE X0.2V数字规格(LVDS)逻辑输入输人电压范围8251575对中的各差分输入输入差分电压阈值100+100接收机差分输入阻抗100Rev. D Page 5 of 36AD9361参数符号最小值典型值最大值件测试条件/注释逻辑输出输出电压高低3751025输出差分电压150Vvvv可分75mV个阶跃编程输出失调电压1200通用输出输出电压高低VDD GPO×08VDD GPO×0.2输出电流SP|时序VDD INTERFACE= 1.8 VSPI CLK周期脉冲宽度SPI ENB建立至第一 SPI CLK上升沿最后 SPI CLK下降沿至0SPI ENB保持SPI DI数字输入建立至SP⊥CLKts数据输入保持至 SPI CLKnsSPI CLK上升沿至输出数据延迟4线模式3线模式ns总线周转时间,读BBP驱动最后地址位后总线周转时间,读0tco(max)nsAD9361驱动最后数据位后数字数据时序(CMOS),VDD INTERFACE=1.8VDATA CLK时钟周期1627661.44 MHZDATA CLK和 FB CLK脉冲宽度t的45%tcp的556TX数据TX FRAME,P0_D和建立至FB_CLK保持至 FB CLKHIX0DATA CLK至数据总线输出延迟toax01.5DATA_CLK至 RX FRAME延迟1.0脉冲宽度使能TXNRXFDD独立ENSM模式TXNRX建立至 ENABLEt0nsTDD ENSM模式总线周转时间RX前2×toTDD模式RX后2×tcpTDD模式容性负载3容性输入pRev. d Page 6 of 36AD9361参数符号最小值典型值最大值件测试条件注释数字数据时序(CMOS)VDD INTERFACE=2.5VDATA CLK时钟周期16.27661.44 MHzDATA CLK和 FB CLK脉冲宽度tcp的45%tc的55%TX数据TX FRAME,POD和P1 D建立至FB_CLK保持至 FB CLKDATA CLK至数据总线输出延迟tox0DATA CLK至 RX FRAME延迟tODDy脉冲宽度使能IXNRXXNRXPW trpFDD独立ENSM模式IXNRX建立至 ENABLEtTXNRXSU OIDD ENSM模式总线周转时间RX前2×toTDD模式tRusT2×tTDD模式容性负载容性输入数字数据时序LvDS)DATA_CLK时钟周期4.069245.76MHzDATA_CIK和FB_CK脉冲宽度t的45t的59TX数据IX HRAM和XD建立至 FB CLK保持至FB_CLKDATA CLK至数据总线输出延迟|tox025DATA CLK至 RX FRAME延迟0.25脉冲宽度使能FDD独立ENSM模式TXNRX建立至 ENABLE0TDD ENSM模式总线周转时间RX前2RX后容性负载容性输入pl电源特性13V电源电压1.2671.33VDD INTERFACE电源额定设置2.5LVDS1.82.5VDD INTERFACE容差+5%容差适用于任何电压设置VDD GPO电源标称设置3.3未用时,必须设为13VVDD GPO容差5%容差适用于任何电压设置电流消耗VDDx,休眠模式所有输入电流之和VDD GPO50A无负载指参数中多功能引脚的单个功能时,只会列出引脚名称中与规格相关的部分。要了解多功能引脚的仝部引脚名称,请参见引脚配置和功能描述"部分。Rev. D Page 7 of 36AD9361功耗一vDD_ INTERFACE表2 VDD INTERFACE=12V参数最小值典型值最大值件测试条件/注释休眠模式加电,器件禁用1RX 1TX DDRLTE10单端口2.9mA3072MHz数据时钟,CMOS双端∏2.7mA1536MHz数据时钟,CMOSLTE20双端口5.2mA3072MH数据时钟,CMOS2RX, 2TX, DDRLTE双端口1.3DA768MHz数据时钟,CMOSLTE10单端口4.6mA6144MHz数据时钟,CMOS双端口5.0mA3072MHz数据时钟,CMOSLTE20双端口8.2mA6144MHz数据吋钟,CMOSGSM双端口0.21.08MHz数据时钟,CMOSWiMAX 8.75双端口3.320MHz数据时钟,CMOSWiMAX 10单端口TDD RX0.5mA224MHz数据时钟,CMOSTDD TX3.6A224MHz数据时钟,CMOSFDD3.8448MHz数据吋钟,CMOSWiMAX 20双端口FDD6.7mA448MHz数据时钟,CMOS表3vDD| NTERFACE=18V参数最小值典型值最大值件测试条件/注释休眠模式加电,器件禁用1RX 1X DDRLTE10单端口4.5A3072MHz数据时钟,CMOS双端口4.1mA1536MHz数据时钟,CMOSLTE20双端口8.0mA30.72MHz数据时钟,CMoS2RX.2TX DDRLTE双端口2.0mA768MHz数据时钟,CMOSLTET0单端口8.0A6144MHz数据时钟,CMOS双端口7.5mA3072MHz数据时钟,CMOSLTE20双端口140mA6144MHz数据时钟,CMOSGSM双端口0.3A1.08MHz数据时钟,CMOSWiMAX 8.75双端口5.0MA20MHz数据时钟,CMOSRev. d Page 8 of 36AD9361参数最小值典型值最大值件测试条件/注释WiMAX 10单端口I DD RX07mA224MHz数据时钟,CMOTDD TX5.6mA224MHz数据时钟,CMOSFDD60448MHz数据时钟,CMOSWIMAX 20双端口FDD107mA448MHz数据时钟,CMOSP-P5675mV差分输出140mA240MHz数据时钟,LVDS300m差分输出350A240MHz数据时钟,LVDS450mV差分输出470mA240MH数据时钟,LVDS表4 VDD INTERFACE=25V参数最小值典型值最大值件测试条件/注释休眠模式150A加电,器件禁用1RX, 1TX DDRLTE10单端口6.5mA3072MHz数据时钟,CMOS双端口6.0A1536MHz数据时钟,CMOSLTE20双端口115nA3012MHz数据时钟,CMOS2RX, 2TX DDRLTE双端口30mA768MHz数据时钟,CMOsLTE10单端口115mA6144MHz数据时钟,CMOS双端口A3072MHz数据时钟,CMOSLTE20双端口2006144MHz数据时钟,CMOSGSM双端口0.5A1.08MHz数据时钟,CMOWiMAX 8.75双端口7.3A20MHz数据时钟,CMOSWIMAX 10单端TDD RX224MHz数据时钟,CMOSTDDTX8.0mA224MHz数据时钟,CMOSFDD8.7mA448MHz数据时钟,CMOSWiMAX 20双端口FDD153A448MHz数据时钟,CMOSP-P5675mV差分输出26.0240MHz数据时钟,LVDS300mV差分输出450mA240MHz数据时钟,LVDS450mV差分输出mA240MHz数据时钟,LVDSRev. D Page 9 of 36AD9361功耗一—vDDD1P3_DG和vDDA(全部13V电源组合)表5800MHz,TDD模式参数最小值典型值最大值件测试条件/注释1 RX5MHz带宽180nA连续RX10MHz带宽210A迕续RX20MHz带宽260MA连续RX2RX5MHz带宽265MA连续RX10MHz带宽315A连续RX20MHz带宽405mA连续RX1TX5MHz带宽dBl340nA连续TX-27dBmA连续TX10MHz带宽7 dBm360A连续TX27 dBm220MA连续TX20MHz带宽7 dBm400连续TX-27 dBm250mA连续TX5MHz带宽7 dBm550连续TX27 dB260连续TX10MHz带宽7 dBmA连续TX2 dBm310A连续TX20MHz带宽7 dBm660nA连续TX-27 dBm370mA连续TXRev. D Page 10 of36
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