ADRC自抗扰控制

一款基于c语言的小游戏，比较有意思，附带c的源码供参考

为使用PSO提供了具体的事例，并详细说明怎样使用该Matlab编写的PSO算法，对一般的问题有借鉴功能。里面包含3个.m文件一个.doc文件，.doc文件讲授PSO算法的基本原理，并且采用实例讲解，.m文件为PSO算法实现的代码，详细用法已在word文档有说明，希望对你们有用。

利用智能决策技术，模拟作战防御，并给出正确的防御方案

matlab 写的人工蜂群算法，其中有两个文件，是两个蜂群算法的例子。

基于状态空间的模型预测MPC控制器的设计，附带例子（MATLAB）

单相全桥逆变器simulink仿真，内含SPWM输出模块，可以通过设置调制比/基波频率/载波频率查看逆变器的响应效果。

88E1116R_Datasheet，marvell以太网phy芯片手册，全本88E1116RM A RV E LL. Alaska Gigabit Ethernet TransceiverOVERVIEWFEATURESThe Alaska 88E1116R Gigabit Ethernet Transceiver is10/100/1000BASE-TIEEE 802.3 complianta physical layer device containing a single GigabitSupports reduced pin count GMII(RGMID)interfaceEthernet transceiver. The transceiver implements theFour RGMii timing modesEthernet physical layer portion of the 1000BASE-T,100BASE-TX. and 10base-t standards. t is manufacIntegrated mdi interface termination resistors thateliminate twelve passive componentstured using standard digital CMOS process and con-tains all the active circuitry required to implement theEnergy Detect and Energy Detect+ low powerphysical layer functions to transmit and receive data onmodesstandard Cat 5 unshielded twisted pairThree loopback modes for diagnosticsThe 88E1116R device has two regulators to generateDownshift"mode for two-pair cable installationsall required voltages. The 88E1116R device can beFully integrated digital adaptive equalizers, echopowered by a single 1.8V, 2.5V, or 3. 3V supply Alternacancellers, and crosstalk cancellerstively, if the regulators are not used, then the 88E1116RAdvanced digital baseline wander correctiondevice can be powered by a 1. 8v and 1.2V supplyAutomatic MDi/MDIX crossover at all speeds ofThe 88E1116R device incorporates the Marvell@ VirtualoperationCable Tester (VCTTM)feature, which uses TimeAutomatic polarity correctionDomain Reflectometry(TDR)technology for the remotelEEE 802. 3u compliant Auto-Negotiationidentification of potential cable malfunctions, thusSoftware programmable LEd modes including LEDreducing equipment returns and service calls. UsingtestingVCT, the alaska 88E1116R device detects and reportspotential cabling issues such as pair swaps, pair polar-Supports IEEE 1149.1 JTAGity and excessive pair skew. The device will also detectMDC/MDIO Management Interfacecable opens, shorts or any impedance mismatch in theCRC checker, packet countercable and reporting accurately within one meter the disPacket generationtance to the faultVirtual Cable Tester(VCT)The 88E1116R device integrates MDI interface terminaAuto-Calibration for MAc Interface outputstion resistors into the Phy. this resistor integrationComa Mode supportfacilitates board layout and reduces board cost byRequires a single 1.8v supplyreducing the number of extenal components. The new10 pads can be supplied with 1.8V, 2.5V, or 3. 3VMarvell calibrated resistor scheme will achieve andexceed the accuracy requirements of the IEEE 802.3Two regulators generate all required voltagesRegulator can be supplied with 1.8V,2.5V or 3.3Vreturn loss specificationsCommercial gradeThe 88E1116R device supports the reduced gmll64-Pin QFN package(RGMI)for direct connection to a MAC/Switch portThe 88E1116R device uses advanced mixed-signal processing to perform equalization, echo and crosstalkcancellation, data recovery, and error correction at agigabit per second data rate. The device achievesrobust performance in noisy environments with very lowpower dissipationThe 88E 1116R device is offered in a 64-pin QFn pack-The 88E1116R device is footprint compatible with the88E1116 device As the 88E 1116R device employs integrated MDi interface terminations, all external mDIinterface termination resistors and capacitors must beremoved when migrating from the 88E1116 to88E1116R. See 88E1116 to 88E1116R Migration Appli-cation note for more detailsCopyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 388E1116RMARVELLo Alaska Gigabit Ethernet TransceiverMagnMedia Types10/1001000Mbps88E1116R|a盖10BASEEthernet macRJ-45Device100BASE-TX1000BASE-TMAC InterfaceRGMII88E1116R Device used in Copper ApplicationDoc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellPage 4Document Classification: Proprietary InformationMarch 1. 2007. AdvanceTable of contentsSECTION 1. SIGNAL DESCRIPTION1.1 Pin Description101.1.1 Pin Type Definitions1264 Pin QFN Pin Assignment List- Alphabetical by Signal Name.……,…,,…,161.3 O State at Various Test or reset modes .mmm.,17SECtION 2. FUNCTIONAL SPECIFICATIONS2.1 Copper Media Interface..国面画192.2 MAC Interface(RGMII)4192.2.1 10/100 Mbps Functionality2.2.2 TX ER and RX ER Codingaaaaaiiaia t23Lo。 pback……………,….….….,.,…….…,…,….….……,…….……………212.3.1 MAC Interface Loopback212.3.2 Line Loopback.222.3.3 EXternal Loopback24 Synchronizing F|FQ….…,,…,…,,,,,,…,,,,,…,,,…,,,,…,……242.5 Copper Media Transmit and receive Function.man..m日a252.5.1 Transmit side Network Interface252.5.2 Encoder2.5.3 Receive Side Network Interface2.5. 4 Decoder2.6 Regulators and Power Supplies282.6.1 AVDD2.6.2 AVDDC282.6.3 AVDDR292.6.4 AVDDX2.6.5DVDD…292.6.6 VDDO26.7 VDDOR.292.7 Power Management302.7.1 Low Power Modes2.72 Low Power Operating Modes……2.7.3 RGMl Effect on Low Power modes3228Auto- Negotiation.........……33Copyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 588E1116RMARVELL Alaska Gigabit Ethernet Transceiver2.9 Downshift Feature…352.10 Advanced virtual Cable Tester362.10.1 Maximum Pe2.10.2 First Peak372.10.3 Offsetp2. 10. 4 Sample Poin2.10.5 Pulse Amplitude and Pulse Width392. 10.6 Drop Link...392.10.7 VCTTM With Link Up392.11 Data Terminal Equipment (DTE)Detect........2.12 CRC Error Counter and frame Counter412.12. 1 Enabling the crc error counter and frame counter.412.13 Packet generator412.14 MDI/MDIX Crossover422.15P。 olarity Correction..…432.16LED,,,,,,,,,,,…,…,,442.16.1 LED Polarity452.16.2 Pulse Stretching and Blinking.462. 16.3 Bi-Color LED Mixing472.16.4 Modes of Operation482.17 EEE 1149.1 Controller522.17.1 BYPASS Instruction522.17.2 SAMPLE/PRELOAD Instruction.52217.3 EXTEST Instruction552,17.4 The clamP Instruction552,17.5 The high-z Instruction552.17.6 ID CODE Instruction552.18 Interrupt.552.19 Automatic and Manual Impedance Calibration.……,…,…,…,…,…,…,……562. 19. MAC Interface calibration circuit562.19.2 MAC Interface Calibration Register Definitions2. 19.3 Changing Auto Calibration Targets2. 19. 4 Manual Settings to The Calibration Registers“““582.20 Configuring the 88E1116R Device..2.20. 1 Hardware Configuration612.20.2 Software Configuration-Management Interface632.21 Temperature sensor64Doc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellDocument Classification: Proprietary InformationMarch 1. 2007. AdvanceSECTION 3 REGISTER DESCRIPTION65SECTION 4, ELECTRICAL SPECIFICATIONS1104.1. Absolute Maximum Ratings,…,…,…,…,,…,…,…,…,…,…,,…,…,……,1104.2. Recommended Operating Conditions..,,.,……,,……1114.3. Package Thermal Information.………….……….…………1124.3.1 Thermal Conditions for 64-pin QFn Package1124. 4. Current Consumption...........面量量…1134.4.1 Current Consumption AVDD..1134.4.2 Current Consumption AVDDC..1134.4.3 Current Consumption AVDDR1144.4.4 Current Consumption AVDDX1144.4.5 Current Consumption DVDD4.4.6 Current Consumption VDDo1154.4.7 Current Consumption VDDOR1154.4.8 Current Consumption Center Tap1154.5. DC Operating Conditions1164.5.1 Non-RGMlI Digital Pins1164.5.2 Internal resistor Description4.5.3 Stub-Series Transceiver LogIc (55/.21174.5 4 EEE DC Transceiver Parameters1194.6. AC Electrical Specifications1204.6.1 Reset Timing ..1204.6.2 XTAL IN/XTAL OUT Timing1214.6.3 LED to CONFIG Timing1214.7 RGMII Interface Timing……,,…1224.7.1 RGMl AC Characteristics4.7.2 RGMII Delay Timing for different RGMiI Modes1234.8. MDC/MDIO Timing…12549. JTAG Timing…,,…1264.10.EEE AC Transceiver parameters1274.11. Latency Timing........….…1284.11.1 RGMII to 1000BASE-T Transmit Latency Timingaa“aa1284.11.2 RGMII to 100BASE-TX Transmit Latency Timing1284.11.3 RGMiI to 10BASE-T Transmit Latency Timing4. 11. 4 1000BASE-T to RGMll Receive Latency Timing1304. 11.5 100BASE-TX to RGMII Receive Latency Timing.1304.11.610 BASE-T to RGMll Receive Latency Timing……….….…………,130SECTION 5. PACKAGE MECHANICAL DIMENSIONS1315.1 64-Pin QFN Package...131Copyright o 2007 MarvellCONFIDENTIALDoC. No. MV-S104224-00. Rev.March 1. 2007. AdvanceDocument Classification: Proprietary InformationPage 788E1116RMARVELL Alaska Gigabit Ethernet TransceiverSECTION 6. ORDER INFORMATION1336.1 Ordering Part Numbers and Package Markings1336.1.1 RoHS 5/6 Marking Example1346.1.2 RoHS 6/6 Marking Example135Doc. No. MV-S104224-00. Rev.CONFIDENTIALCopyright o 2007 MarvellPage 8Document Classification: Proprietary InformationMarch 1. 2007. AdvanceSignal DescriptionSection 1. Signal DescriptionThe 88E1116R device is a 10/100/1000BASE-T Gigabit Ethernet transceiverFigure 1: 88E1116R Device 64-Pin QFN Package(Top view)文gg9廿廿廿廿廿廿凵廿廿廿凵廿守令导好寸守哥导$85#將RX CTRL4932TSTPTRXDIO5031MDIPIORXD[51EPAD-VSS30d MDIN[O]VDDOR52290 AVDDRX CLK5328叫NCRXD[2]54AVDDRXD]5526MD|P[1VDDOR56VREF57MARVEL L③24E MDIP[2TXD0]□5823MDIN[2TXD[1]B5988E1116R22AVDDTX_CLK F6021AVDDTXD[2Top ViewMDIP[3TXD3]□62190 MDIN[3]TⅩCTRL6318□NCCONFIG[O]64CTRL18三s回口cc×O百口口艺艺安安Copyright o 2007 MarvellCONFIDENTIALDoc. No. MV-S104224-00 RevMarch1.2007. AdvanceDocument Classification: Proprietary InformationPage 988E1116RMARVELL. Alaska Gigabit Ethernet Transceiver1.1 Pin Description1.1.1 Pin Type DefinitionsPin Ty peDefinitionHInput with hysteresisVOInput and outputInput onlOutput onlPUIntemal pullPDInternal pull downOpen drain outputTri-state outputADC sink capabilityDoC. No. MV-S104224-00 RevCONFIDENTIALCopyright o 2007 MarvellPage 10Document Classification: Proprietary InformationMarch.2007. Advance

简单图书管理系统,在老师教授下使用Microsoft Visual Studio 2008软件开发工具，与Microsoft SQL Server 2008 数据库结合而开发的一个基本图书管理，其中里面有添加用户，修改密码，管理图书编号，和管理图书最基本的增删查改等功能！基本完善！里面有源代码，数据库！

随着单片机在各个领域的广泛应用，许多用单片机做控制的球赛计时计分系统也应运而产生。本次设计采用单片机AT89C51编程控制LED七段共阴极数码管作显示的球赛计时计分系统。

IP核概述.doc SOPC中自定义外设和自定义指令性能分析.pdf 基于Avalon总线TLC5628自定义IP核的开发.pdf 基于Avalon总线的TFT LCD 控制器的设计.doc 基于Avalon总线的可配置LCD控制器IP核的设计.doc 基于Avalon总线的可配置LCD控制器IP核的设计.pdf 基于Avalon总线的直流电机PWM控制.pdf 基于Avalon总线的键盘和VGA控制接口设计.pdf 基于NIOS II嵌入式处理器实现LCD的控制 .doc 基于Nios II的I2C总线接口的实现.doc 基于NIOS_嵌入式软核处理器的LCD控制方法研究