Clarke_Jakes_Zheng模型matlab仿真

说明：  仿真相干光通信系统，包含各种损伤和均衡算法(the model of coherent optical fiber channel)

无线通信类的，适用于自适应调制算法，用户算法(AMC algorithm)

说明：  QPSK通过瑞利信道的MATLAB仿真 包括高斯白噪声和瑞丽衰减信道(QPSK_Rayleigh fading Both the AWGN channel and Rayleigh fading channel)

完成对cmw500测试仪器的程控及初始化操作(Novice is currently in the learning stage. CMW500 GSM non-signaling test program example, including initialization)

16QAM调制信号的GAD定时恢复，对定时恢复环路的验证和实现(Gardner Timing Recovery for 16QAM)

DVB-T（2K模式）同步，仿真最大似然相关（MLE）算法，在符号开始位置出现谱峰(DVB-T (2K mode) synchronization, simulation Maximum Likelihood correlation (MLE) algorithm. Symbol began in the peaks of position)

这是整套的ldpc-ofdm仿真模拟代码，可以运行的，输出的是误码率图像(This is the whole set of ldpc-ofdm simulation code, you can run the output image is the bit error rate)

One issue with underwater sensors is how to efficiently transfer large amounts of data collected by the node to an interrogating platform such as an underwater vehicle. It is often impractical to make a physical connection between the node and the vehicle which suggests an acoustic or optical wireless solution. For large amounts of data, the high bandwidth of underwater optical wireless is an advantage. A small, low-cost platform to demonstrate the potential of an optical wireless communications interface for underwater sensor nodes is demonstrated. To enhance the reliability and robustness of the optical wireless communication digital signal processing and error correction techniques are used. The system was tested in 3 and 7.7 meter tanks at 5 Mbps with the turbidity of the water controlled by the addition of Maalox.

一个明智的方法开发调试 利用OPNET调试器(教ODB) 如何调试模型 评介特点和命令 讨论了在调试过程 Step-by调试步骤方法模型(Develop a sensible approach to debugging Teach use of OPNET Debugger (ODB) How to debug models Review features and commands Discuss the debugging process Step-by step methods for debugging models )

本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)