CRTSⅢ型板式无砟轨道静力学模型

一份完整的复杂模型机设计与实现的报告，详细写明了数据格式以及指令格式，另外还有实验步骤及系统测试。(A complete complex model of the machine design and implementation, specifying the data format and instruction format, in addition to the experimental procedures and system testing.)

HGI guideline paper HGI-GD006-R2 IMS Enabled HG

在电网电压频率波动或者三相不平衡的情况下,硬件锁相很难准确检测到基波正序的相位。在结合PWM整流器空间矢量解耦控制算法的基础上,将软件锁相环技术应用在PWM整流器控制系统中,并用仿真和实验验证了该方案的可行性。实验结果表明,该方案解决了电网电压频率波动及三相不平衡时的相位同步等问题,并在工程上具有一定参考价值。(Frequency or voltage fluctuations in three-phase unbalanced case, the hardware lock is difficult to accurately detect the fundamental positive sequence phase. In the space vector PWM rectifier with decoupling control algorithm based on the software used in the PWM rectifier PLL control system, and use simulation and experimental verification of the feasibility. Experimental results show that the solutions to address the voltage and frequency fluctuations of the phase unbalanced three-phase synchronization issues, and the project has a certain reference value.)

说明：  适用于电力系统模型搭建的hvdc线路，可以用于分析hvdc的稳定性也可以用于搭载其他部件的研究(HVDC lines suitable for power system models can be used to analyze the stability of HVDC and to carry other components)

PHOTOLITIOGRAPHY( desigining and layout of cmos)

设计了一种新颖的三相锁相环的设计算法，可以用于不平衡电压的相位检测和跟踪。(A modified soft phase lock loop algorithm improving the performance inDynamic phase tracking and detection of unbalanced voltage)

开关电源变压器如何分辨同名端，有了它你就可以(Switching power supply transformer how to tell the same name side)

5kW光伏最大功率点跟踪电路的设计,采用DCDC模式升压(5kW photovoltaic maximum power point tracking circuit design, DCDC mode boost)

说明：  8051指令集,指令說明 ADD, CLR, MOV, MOVX,..等(Core 8051 Instruction Set Details ADD, CLR, MOV, MOVX,..)

约束所有时钟（包括你的设计中特有的时钟）对准确的时序分析结果而言是必不可少的。Quartus II TimeQuest Timing Analyzer为各种各样的时钟配置和典型时钟提供许多SDC命令。(Constraining all clocks, including the clocks unique to your design, is essential for accurate timing analysis results. The Quartus II TimeQuest Timing Analyzer provides many SDC commands for a variety of clock configurations and typical clocks.)