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digital-DC_DC-control-chip

于 2020-10-07 发布 文件大小:10120KB
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  复旦大学 数字DCDC控制芯片设计 利用matlab中simulink建模 verilog语言实现 对于芯片设计有较大参考价值(Fudan University digital DCDC control chip design using Simulink matlab modeling Verilog language to achieve a larger reference value for the design of the chip)

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