chirpmodsys

300 MHz内部时钟频率 集成的12位输出DAC 超高速，3 ps RMS抖动比较器9854代码(300 MHz Internal Clock Rate Integrated 12-Bit Output DAC Ultrahigh-Speed, 3 ps RMS Jitter Comparator9854code)

基于quartus的布斯乘法器的verilog 实现。布斯乘法算法是计算机中一种利用数的2的补码形式来计算乘法的算法。该算法由安德鲁·唐纳德·布斯于1950 年发明，当时他在伦敦大学伯克贝克学院做晶体学研究。布斯曾使用过台式计算器，由于用这种计算器来做移位计算比加法快，他发明了该算法来加快计算速度。(The verilog codes of booth multiplier based on quartus. Booth multiplication algorithm is a computer algorithm using the complement form of number 2 to calculate the multiplication. The algorithm was invented in 1950 by Andrew Donald booth, who was working on crystallography at birkbeck college, university of London. Booth used a desktop calculator, and because it was faster to do shifts than to add, he invented the algorithm to speed up the calculations.)

用于仿真2，4，8，16，.......任意进制的M-QAM的仿真源代码，MATALB编写(for simulation 2,4,8,16, ... arbitrary 229 M-QAM the simulation source code, prepared Aspect)

说明：  对ofdm不同cp长度下系统性能的分析(Performance analysis of OFDM systems with different CP lengths)

输入学生的name,number,class等内容(importation students name, number, class, etc.)

说明：  实现Ethercat现场通讯的主从站代码实例(An Example of Master-slave Station Code for Ethercat Field Communication)

这是一个用CVI编写的模拟标准频谱仪界面，包含了前面板和各种常用的输入按键。(This program is developed by CVI used to simulate a standard interface of spectrum analyzer ,presented with popular keys and functions.)

仿真了恒虚警的平均单元算法，给出仿真结果，同时分析了不同窗口数对虚警率和检测率的影响，并写了详细的注释(The constant false alarm average cell algorithm is simulated, and the simulation results are given. Meanwhile, the influence of different window numbers on false alarm rate and detection rate is analyzed, and detailed annotations are written.)

迭代ACCF相参积累与参数估计,SAR回波，只加了噪声(Iterative ACCF coherent accumulation and parameter estimation)

说明：  语言的文法规则 说明 对原编译程序作了如下修改,增加了输入文件(The grammar rules of the language have been modified as follows to add input files to the original compile)