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于 2020-06-28 发布 文件大小:834KB
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代码说明:

  对全息图进行卷积法的再现,利用matlab计算全息图模拟仿真(Reappearance of convolution method for hologram)

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    另一款BP/TP使用的SVGA图形模式程序。效果也不错(Another BP/TP use SVGA graphics mode procedures. The results would be good)
    2008-01-17 17:51:31下载
    积分:1
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    2014-07-04 23:08:19下载
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  • bp_matlab
    说明:  MATLAB源代码实现BP人工神经网络算法。(BP Neural Network based on MATLAB. )
    2010-04-06 11:17:44下载
    积分:1
  • LOT
    对一维信号,用正交重叠变换做DCT和逆DCT(Of one-dimensional signals, using orthogonal lapped transform DCT and inverse DCT to do)
    2008-12-29 21:35:03下载
    积分:1
  • 高斯滤波
    输出不同截止频率的滤波图像和不同截止频率的滤波图像的幅度谱。(Different filter images are output for different cutoff frequencies.)
    2017-07-12 20:58:18下载
    积分:1
  • pivsingle
    用于pivlab处理得到的流场数据画图,具体使用见注释(Flow field data plots for piv processing)
    2021-03-17 14:49:20下载
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  • xapp741
    说明:  该设计使用8个AXI视频直接存储器访问(AXI VDMA)引擎同时移动16个流(8个传输视频流和8个接收视频流),每个流以1920 x 1080像素格式以60赫兹刷新率移动,每个像素24个数据位。此设计还具有额外的视频等效AXI流量,该流量由为1080p视频模式配置的四个LogiCORE AXI流量发生器(ATG)核心生成。ATG核心根据其配置生成连续的AXI流量。在本设计中,ATG被配置成以1080p模式生成AXI4视频流量。这使得系统吞吐量需求达到DDR的80%左右带宽。每个AXI VDMA由LogiCORE IP测试模式生成器(AXI TPG)核心驱动。AXI VDMA配置为在自由运行模式下运行。每个AXI VDMA读取的数据被发送到能够将多个视频流多路复用或叠加到单个输出视频流的通用视频屏幕显示(AXI OSD)核心。AXI OSD核心的输出驱动板载高清媒体接口(HDMI技术)视频显示接口通过RGB到YCrCb颜色空间转换器核心和逻辑核心IP色度重采集器核心。LogiCore视频定时控制器(AXI VTC)生成所需的定时信号。(The design uses eight AXI video direct memory access (AXI VDMA) engines to simultaneously move 16 streams (eight transmit video streams and eight receive video streams), each in 1920 x 1080 pixel format at 60 Hz refresh rate, and 24 data bits per pixel. This design also has additional video equivalent AXI traffic generated from four LogiCORE AXI Traffic Generator(ATG) cores configured for 1080p video mode. The ATG core generates continuous AXI traffic based on its configuration. In this design, ATG is configured to generate AXI4 video traffic in 1080p mode. This pushes the system throughput requirement to approximately 80% of DDR bandwidth. Each AXI VDMA is driven from a LogiCORE IP Test Pattern Generator (AXI TPG)core. AXI VDMA is configured to operate in free running mode. Data read by each AXI VDMA is sent to a common Video On-Screen Display (AXI OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream.)
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