MATLAB

this file is gabor bank filter

pso算法，此算法源程序采用MATLAB编写，可用于向量机优化(pso algorithm that uses source code written in MATLAB, can be optimized for vector machines)

说明：  一个用纯C语言编写的GABOR 变换源码，我在网上找了很久也没找到，只好自己根椐matlab版源码写了一个源码。(A pure C language source code written in GABOR transform, I am looking for a long time on the Internet had not found, had noted in their written a matlab source code version of source code.)

毕业设计有用，遗传算法无功优化，插值与拟合的matlab实现。( Graduation useful Genetic algorithm based reactive power optimization, Interpolation and fitting matlab implementation.)

关于MATLAB的一些应用实例，我同学编的，大家可以看一下(on MATLAB some application examples, I classmate series, we can look at)

实现了BPSK信号的调制与解调，以及同步载波的提取(Achieve BPSK modulation and demodulation of the signal, and the extraction of carrier synchronization)

基于数控机床进给系统PID参数优化程序PSO。(Feed System Based on PSO PID parameter optimization program CNC machine tools.)

利用STDM方法嵌入水印信息，可设置量化步长，选择各种经典的攻击方式，控制攻击强弱，返回误码率和峰值信噪比(Stdm method using embedded watermark information, to set the quantization step size, choose a variety of classic attacks, controlling the strength of the attack and returned to the bit error rate and peak signal to noise ratio)

在这项工作中,我们提出一个基于混沌的集成　　抖动升压电路用于多个振荡器抽样真的　　随机数发生器的架构。多个环形振荡器　　真正的随机数生成器需要大量　　戒指的积累内在抖动的逆变器　　有用的水平。因此,他们占领大的硅区域和消费　　大量的权力。该电路提供　　另一种方法推动使用混乱的抖动　　动态生成的两个环形振荡器的非线性耦合　　需要更少的组件的数量。的简单性　　提出了电路提供高集成和内在潜力　　面积和功耗低等优点。混沌动力学　　研究了电路的使用数值和电路　　模拟。测量测试芯片实现的结果　　250纳米CMOS技术(In this work, we present a chaos based integrated jitter booster circuit for use in multiple oscillator sampling true random number generator architecture. Multiple ring oscillator based true random number generators need significant number of rings for accumulating the intrinsic jitter of inverters to a useful level. Thus, they occupy large silicon area and consume considerable amount of power. The proposed circuit offers an alternative approach for boosting jitter using the chaotic dynamics generated by non-linear coupling of two ring oscillators that require fewer number of components. The simplicity of the proposed circuit offers high integration potential with inherent low area and power consumption advantages. Chaotic dynamics of the circuit was studied using both numerical and circuit simulations. Measurement results of the test chip implemented at 250nm CMOS technology node confirmed chaotic behavior and jitter boosting capability. To the very best of our knowled)

this is matlab codes for t-norms