SVD

说明：  本程序是AR(2)模型进行数据建模，再进行kalman滤波，进行数据去躁处理，尤其用在光纤陀螺上(AR (2) model for data modeling, further Kalman filtering, data processing to impatient, especially with the fiber gyro)

扩展有限元的Fortran代码，用于扩展有限元的数值仿真计算(Extended finite element of the Fortran code for the extended finite element numerical simulation.)

abaqus interface xfem

说明：  Umat Abaqus for plasticity

有PMUSIC 校正前和校正后的比较，sar图像去噪的几种新的方法，实现了图像的加水印，去噪，加噪声等功能。( A relatively before correction and after correction PMUSIC, Several new methods sar image denoising, Realize image watermarking, de-noising, plus noise and other functions.)

针对多期随机规划问题，利用情景树方法来求解(For multi-period stochastic programming problems, the use of scenarios to solve Tree)

BP神经网络用于函数拟合与模式识别，研究生时的现代信号处理的作业，包括数据分析、绘图等等。( BP neural network function fitting and pattern recognition, Modern signal processing jobs when the graduate, Data analysis, plotting, etc..)

(一) 模拟产生一个正态随机序列X(n)，要求自相关函数满足 画出产生的随机序列波形。 ((A) simulation to generate a normal random sequence X (n), required to meet the autocorrelation function of random sequences generated by the waveform plot.)

高超声速飞行器上升轨迹优化计算。采用勒让德伪谱法直接优化方法。(trajectory optimization of hypersonic craft program with legendre method)

稀疏矩阵的DIA/ELLPACK/COO/CSR/HYB表示形式，以及各表示形式下的稀疏矩阵乘法（稀疏大矩阵*矢量）的CUDA实现。对于矩阵中每一行稀疏元素个数较统一的情况，ELLPACK表示最佳，其次是HYB（ELL+COO）。 CUDA™ 是一种由NVIDIA推出的通用并行计算架构，该架构使GPU能够解决复杂的计算问题。 它包含了CUDA指令集架构（ISA）以及GPU内部的并行计算引擎。 开发人员现在可以使用C语言来为CUDA™ 架构编写程序(Sparse matrix DIA/ELLPACK/COO/CSR/HYB representation, as well as the representation of the sparse matrix multiplication (large sparse matrix* vector)' s CUDA implementation. For each row of the sparse matrix representing the number of elements the case of unification, ELLPACK that the best, followed by HYB (ELL+COO). NVIDIA CUDA ™ is introduced by a general purpose parallel computing architecture that makes the GPU to solve complex computational problems. It contains the CUDA Instruction Set Architecture (ISA) and the GPU parallel computing engine. Developers can now use the C language to write programs for the CUDA ™ architecture)