windowPCA

说明：  三次样条插值函数，分别是基于二阶导数的和一阶导数实现的(Cubic spline interpolation function)

说明：  内容：基于MATLAB的小波变换程序 具体功能：实现四级信号的小波分解和重构(Content: wavelet transform based on Matlab: four level signial wavelet decomposition and reconstruction are implemented.)

SARBM3D matlab code for image preocessing

纹理特征提取，比较使用的程序。适合图形图像处理方面的特征提取。(Texture feature extraction, comparing the use of procedures. Perfect for graphics image processing feature extraction.)

Laplacian pyramid方法的matlab程序代码，对用Laplacian pyramid多尺度方法的同志肯定有用(Laplacian pyramid of Matlab code, Laplacian pyramid with the multi-scale approach certainly useful comrades)

Read jpeg rgb color structure

图像盲解卷积复原，一模方法，算法在压缩包内(Blind Image Deconvolution recovery, a model approach, the algorithm in the compressed package)

说明：  这是一个增强的nsst程序，采用matlab编程，可以运行。(This is an enhanced NSST program, using MATLAB programming, can run.)

金属的Blob侦测，使用程序过滤图像上金属上的胡椒盐杂讯。(Blob metal detection, the use of salt and pepper noise filtering process on the image on the metal.)

说明：  该设计使用8个AXI视频直接存储器访问（AXI VDMA）引擎同时移动16个流（8个传输视频流和8个接收视频流），每个流以1920 x 1080像素格式以60赫兹刷新率移动，每个像素24个数据位。此设计还具有额外的视频等效AXI流量，该流量由为1080p视频模式配置的四个LogiCORE AXI流量发生器（ATG）核心生成。ATG核心根据其配置生成连续的AXI流量。在本设计中，ATG被配置成以1080p模式生成AXI4视频流量。这使得系统吞吐量需求达到DDR的80%左右带宽。每个AXI VDMA由LogiCORE IP测试模式生成器（AXI TPG）核心驱动。AXI VDMA配置为在自由运行模式下运行。每个AXI VDMA读取的数据被发送到能够将多个视频流多路复用或叠加到单个输出视频流的通用视频屏幕显示（AXI OSD）核心。AXI OSD核心的输出驱动板载高清媒体接口（HDMI技术）视频显示接口通过RGB到YCrCb颜色空间转换器核心和逻辑核心IP色度重采集器核心。LogiCore视频定时控制器（AXI VTC）生成所需的定时信号。(The design uses eight AXI video direct memory access (AXI VDMA) engines to simultaneously move 16 streams (eight transmit video streams and eight receive video streams), each in 1920 x 1080 pixel format at 60 Hz refresh rate, and 24 data bits per pixel. This design also has additional video equivalent AXI traffic generated from four LogiCORE AXI Traffic Generator(ATG) cores configured for 1080p video mode. The ATG core generates continuous AXI traffic based on its configuration. In this design, ATG is configured to generate AXI4 video traffic in 1080p mode. This pushes the system throughput requirement to approximately 80% of DDR bandwidth. Each AXI VDMA is driven from a LogiCORE IP Test Pattern Generator (AXI TPG)core. AXI VDMA is configured to operate in free running mode. Data read by each AXI VDMA is sent to a common Video On-Screen Display (AXI OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream.)