TD_DCA

说明：  软合并和检测中的认知无线电协作频谱感知,希望对你有用.(Soft Combination and Detection for Cooperative Spectrum Sensing in Cognitive Radio Networks.pdf)

说明：  这是最新的卫星通信基础理论的Matlab仿真实现，pcma以及信号衰减和延迟的仿真。尽管不是我本人原创，但比较都经典。文件为*.m格式 (This is the latest in satellite communications theoretical basis Matlab Simulation, pcma and signal attenuation and delay in the simulation. Although it was not my original, but more are classics. M*. document format)

这是一个CD4067B的技术资料，希望对大家有帮助。(This is a CD4067B technical information, we hope to help.)

STANAG 5066 unclassified

In this paper, we present and analyze efficient frame synchronization and frequency offset compensation scheme with ternary sequences for an orthogonal frequency division multiplexing (OFDM) system in Rayleigh fading channels. Frame synchronization is an essential procedure for normal operation of the OFDM system because of sensitivity to synchronization errors. And when there are frequency offsets in OFDM frame, the loss of orthogonality occurs and the interference problem among several subcarriers is introduced. These fact leads to the requirement for joint implementation of the frame synchronization and frequency offset compensation.

这是研究欧洲DVB-T标准的一套合集，主要介绍了DVB-T单频网的同步技术，以及系统设计和实现。其中对DVB-T单频网进行了详细的讲解，对研究我国的数字电视广播技术也有很好的借鉴作用。(This is the study of the European DVB-T standard a collection, mainly introduces the synchronization technology of DVB-T single frequency network, and the system design and implementation. It make a detailed explanation of DVB-T single frequency network, also have a very good reference for digital television broadcast technology research in china.)

说明：  横河CS3000培训讲义 DCS经典介绍和操作(Yokogawa CS3000 classical training, introduction and operation of DCS notes)

本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)

B-IFDMA pdf document

HYBRID VIDEO CODING MODEL OF FINITE RIDGELET TRANSFORM AND H.264/AVC Tomokazu Murakami and Masashi Takahashi Embedded System Platform Research Laboratory, Hitachi, Ltd. 292, Yoshida-cho, Totsuka-ku, Yokohama, 244-0817, Japan