UVM SV阶段

一本很经典的IC设计中文入门书籍，由任艳颖，王彬编著，翻印几百万册(A very classic introduction to Chinese in IC design book, compiled by Ren Yanying and Wang Bin, reprinted millions of copies)

异步fifo实现，通过双口ram实现异步fifo(Asynchronous FIFO implementation, through dual port RAM to achieve asynchronous FIFO)

64点的 FFT verilog,它是串行计算的，工作频率不到100M，计算速率很高，里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)

USB Blaster full production data

a manual for design implementation of fpga and ASIC using verilog

说明：  422发送源码，目前使用的是20m时钟计算出来的波特率，后期可以根据自己的需要进行修改波特率时期匹配各种情况(422 sends the source code. At present, the baud rate calculated by 20m clock is used. Later, you can modify the baud rate according to your own needs to match various situations)

长帧同步时钟的产生， 源码程序，实验好用(Long frame synchronization clock generation, source program, easy to use experimental)

吠陀乘数花更少的时间来执行使用的 URDHVA TIRYAKBHYAM 算法从吠陀 》 的乘法晒版程序自动完成。这个源代码是 4 X 4 吠陀乘数使用拟议的 4 位加法器

几大代工厂的flash verilog源代码(flash verilog code)

数字自动增益控制 AGC （automatic gain control） Verilog(automatic gain control Verilog)