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linux command Guinness! Boutique dedication! Suitable for beginner linux referen...
linux命令大全!精品奉献!适合初学linux的学友们参考!-linux command Guinness! Boutique dedication! Suitable for beginner linux reference school friends!
- 2022-03-20 14:35:04下载
- 积分:1
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asp net ajax asp net ajaxa sp net ajax
asp net ajax asp net ajaxa sp net ajax-asp net ajax
- 2022-03-20 02:07:33下载
- 积分:1
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java基础学习,3周你就可以成为一名java程序员,只要你每天都学习,一定可以。...
java基础学习,3周你就可以成为一名java程序员,只要你每天都学习,一定可以。-java-based learning, three weeks you can become a java programmer, as long as you learn every day, we can.
- 2023-05-05 10:55:04下载
- 积分:1
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MICROSOFT PRESS
VISUAL C2.0从入门到精通
MICROSOFT PRESS
VISUAL C2.0从入门到精通-MICROSOFT VISUAL C 2.0 from the entry level to proficiency
- 2022-02-04 01:10:57下载
- 积分:1
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xml bundled with the publication Oreilly
java与xml的绑定 oreilly出版-xml bundled with the publication Oreilly
- 2022-07-12 18:49:33下载
- 积分:1
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C++视频教程孙鑫C++视屏教程(全20讲)
C++视频教程孙鑫C++视屏教程(全20讲)-VC6.0
- 2022-02-28 16:25:57下载
- 积分:1
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一本关于学习c#非常有用的书籍
一本关于学习c#非常有用的书籍- About studies the c# extremely useful books
- 2023-02-02 23:35:04下载
- 积分:1
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maxplus good learning books. Details on the maxplus operating processes and step...
maxplus很好的学习书籍.详细介绍了maxplus操作流程及步骤,对学习maxplus很有帮助-maxplus good learning books. Details on the maxplus operating processes and steps, helpful to learn maxplus
- 2022-04-08 15:13:42下载
- 积分:1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分:1
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深入浅出MFC第二版,一本很好的MFC编程的书,有繁体版和简体版的,这里是简体
深入浅出MFC第二版,一本很好的MFC编程的书,有繁体版和简体版的,这里是简体-MFC easy second edition, a very good book MFC Programming, has Traditional and Simplified versions, here is the simplified
- 2023-04-19 03:15:04下载
- 积分:1