FPGA基于PCIE的DMA测试

七段数码管显示数字时 使用VHDL语言编写(VHDL The seven-segment LED display digital clock)

QUARTUSII 9.0 下的三级流水线中值滤波工程，vhdl源程序等。可用于fpga做图像预处理。(the three stage pipeline median filter project under QUARTUSII 9 , VHDL source program. which can be used by FPGA to do image preprocessing. )

vga，显示彩条，及其简单易懂，适合初学(vga, display color bars, and its easy-to-understand, suitable for beginners)

浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)

pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)

用VHDL语言实现QPSK调制功能和解调功能,(Using VHDL language features QPSK modulation and demodulation functions,)

利用verilog语言实现了SHA-1机密算法，具体算法与加密芯片ds28e01一致。(Using Verilog to achieve the SHA-1 secret algorithm, the specific algorithm is consistent with the encryption chip ds28e01.)

基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)

对于学习FPGA的同学来说仿真是必不可少的流程 但是仿真的方法signal tap是必须掌握的(For students learning FPGA simulation is an essential process but the simulation method tap signal is a must)

初学学习verilog的经验，可以帮助新手以正确的思维方式，学习方法学习。(Verilog learning experience)