stm32f103vc 实例 bibl

This model is just testing an idea of MIMO, which IEEE802.11n will have. But I havo not seen the standard, I tried to make it with 11a. Actually this model would not work in real world, because the preambles were not designed to solve the MIMO feature. But this model may be useful to get some idea to start to design a PHY with MIMO. -This model is just an idea of testing MIMO. IEEE802.11n which will have. But I havo not seen the standard. I tried to make it with 11a. Actually this model w ould not work in real world. because the preambles were not designed to solv e the MIMO feature. But this model may be useful t o get some idea to start to design a PHY with MIMO.

这是有关DM642开发板的相关幻灯片，对初学者有帮助-DM642 related ppt ,it will be helpful for beginer

用c51和8255实现双向多路的流水灯电路，并有其控制的c程序，望大家指点一二！-With c51 and 8255 to achieve two-way multi-lamp circuits of the water and have their control c program, hope everyone pointing 12!

应用背景对于初学者是一种比较适合的实验，他是基于k60的。k60又是飞思卡尔的最主要芯片。所以对于那些想做飞思卡尔的同学是一个很好的练手的实验关键技术大家把这个平台好好利用，相互学习共同进步。在这个平台大家节约了好多时间还有省了很多的弯路。起跑线不错很重要，但是方法更重要。可以提高我我们的信心

单片机控制数码管显示，实现计数器功能，使能按下一个按钮之后计数器开始累加。-Single-chip digital control display, the achievement of functional counters so that they can press a button to start after the cumulative counter.

serial port driver in linux

这个是STM32F4 CAN 项目的源代码，CanOpen 协议。

自动升降电梯控制器设计 要求： 设计一个6层楼的电梯控制器。 该控制器可控制电梯完成6层楼的载客服而且遵循方向优先原则，并能响应提前关门延时关门，并具有超载报警和故障报警； 同时指示电梯运行情况和电梯内外请求信息。-Auto-Lift elevator controller design requirements: design of a six-story elevator controller. The controller can control the completion of six-story elevator containing the principle of giving priority customer service, and follow the directions, and can respond to close ahead of schedule delay closing, and has overload alarm and fault alarm also instructed the elevator and elevator operation request information both inside and outside.

在STM32上移植好的uCOS3嵌入式操作系统，并且能够成功运行。开发工具为MDK , 硬件基于stm32。 

VHDL库-对嵌入式程序员有很大的帮助，VHDL语言参考。完整性-我们鼓励大家一起做贡献，可以在库里添加或者删除，这是最好的提升它的方法。教育性-这里有一套设计实例，可以展示这个语言一些最重要的部分，更好的理解完成一个VHDL设计所需要的各功能模块，大的设计可以分解为小的模块。当一些模块有共同的功能时，可以通过共用相同功能模块的方法来节约开发时间。