after concluding CSDN other books on the people of the facts may help a bit

c语言常用算法，是学习c的很好练习的源码。-c language commonly used algorithm, it is a good learning c source code of practice.

Java2语言命令详解（中文版）（PDG版）非常细致，具体的介绍了java2的命令。-order Elaborates on Java2 language (Chinese version) (PDG version) very detailed and specific about the java2 orders.

program orirntes SQL

java编程思想,适合初学者学习,不知道大家有用没,反正高手不用看拉,属于入门教程,想下载java基础教程的适合这个.-java programming ideas, suitable for beginners to learn, do not know if you did not useful, since you do not see pulling belonging Tutorial, I would like to download the java foundation for this tutorial.

案例经典，适合学习使用，并有源代码，课直接使用，有助于学习。-Classic case for learning to use, and active code, direct use of classes, contribute to learning.

有关WinCE：天极论坛精选 主要是平时遇到的问题和解答！ 主要是 付林林 老师的解答！ 非常有价值！-On the WinCE: Featured天极Forum is normally encountered questions and answers! Mainly teachers付林林answers! Very valuable!

BP 网络进行0 - 9 十个数字图像的识别 在BP 算法和数字图像处理技术的基础上, 本文在MATLAB 软件环境下提取Word 文档中26 种字体的 0 - 9 十个数字的图像, 使用MATLAB 神经网络工具箱及图像处理工具箱进行数字的识别, 给出了较详细的处理 步骤及相关程序, 并比较了各种识别算法的收敛速度和识别率。-BP network of 10 digital images 0_9 identification in BP algorithm and digital image processing technology, based on the MATLAB software environment In this paper, extraction of Word documents under the 26 kinds of fonts in the 0- 9 of 10 digital images, using the MATLAB neural network tool boxes and digital image processing toolbox of identification, are given more detailed processing steps and related procedures, and compare a variety of identification algorithms and identify the rate of convergence speed.

计算式求值栈操作-formula evaluates stack operation

Matlab课件讲义及程序源码-Matlab class printed lecture and procedure source code

介绍了此控制器与FPGA接口的控制和HDL (硬件描述语言)实现方法。利用CY7C68013控制器的 Slave F IFO从机方式,用Verilog HDL在FPGA中产生相应的控制信号,实现对数据的快速读写。试验 结果表明此方案传输速度快、数据准确,可扩展到其他需要通过USB进行快速数据传输的系统中-This paper describes the controller and the FPGA interface to control and HDL (hardware description language) implementations. Use CY7C68013 controller Slave F IFO slave mode, using Verilog HDL in the FPGA generate a corresponding control signal to achieve fast read and write data. The results show that this program transmission speed, accurate data can be expanded to other needs through the USB for fast data transfer system