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Xilinx IIC IP
由 Xilinx 提供的 IIC 接口,使用 AXI interface。
Features
‧ AXI interface is based on the AXI4-Lite interface
‧ Master or slave operation
‧ Multi-master operation
‧ Software selectable acknowledge bit
‧ Arbitration lost interrupt with automatic mode switching from master to slave
‧ Calling address identification interrupt with automatic mode switching from master to slave
‧ START and STOP signal generation and detection
‧ Repeated START signal generation
‧ Acknowledge bit generation and detection
‧ Bus busy detec
‧ Fast mode 400 KHz operation or standard mode 100 KHz
‧ 7-bit or 10-bit addressing
‧ General call enable or disable
‧ Transmit and receive FIFOs - 16 bytes deep
‧ Throttling
‧ General purpose output, 1 bit to 8 bits wide
‧ Dynamic Start and Stop generation
‧ Filtering on the SCL and SDA signals to eliminate spurious pulses
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以TI的TMS302VC54x数字信号处理器(DSP)为嵌入式控制器、ERICSSON的蓝牙模块为例,在蓝牙电缆替代协议应用模块的基础上,提出一种将电缆替代协议进行扩展的嵌入式蓝牙应用模式及其硬、软件的实现-The TMS302VC54x to TI digital signal processor (DSP) for embedded controllers, ERICSSON Bluetooth module, for example, in the Bluetooth cable replacement application modules based on the agreement is presented to extend the cable replacement protocol embedded Bluetooth application mode Its hardware and software implementation
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