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一些用c语言编的小游戏,经过tc编译可以使用。其他的编译器没有试验过。...
一些用c语言编的小游戏,经过tc编译可以使用。其他的编译器没有试验过。-Using c language made some small games, after tc compiler can use. Other compilers have not tested.
- 2023-04-05 18:30:04下载
- 积分:1
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pb制动安装程序自动创建数据库
pb制动安装程序自动创建数据库-pb brake setup program automatically creates database
- 2023-08-16 05:15:03下载
- 积分:1
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很好的一个留言本,虽然不是我原创,可是我觉得对大家很有用处,也很值得学习!...
很好的一个留言本,虽然不是我原创,可是我觉得对大家很有用处,也很值得学习!-good a voice Though this is not my original, but I think we had some very useful and very worthwhile learning!
- 2023-09-03 13:15:04下载
- 积分:1
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模糊逻辑空调
fuzzy logic air conditioner
- 2023-03-16 21:35:04下载
- 积分:1
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有效地提高卫星通信网络的TCP吞吐量的方法:卫星代理。本资料正是对卫星代理在NS2中的仿真和模拟,非常有参考性。...
有效地提高卫星通信网络的TCP吞吐量的方法:卫星代理。本资料正是对卫星代理在NS2中的仿真和模拟,非常有参考性。-Very effective in improving TCP throughput of satellite communications network solutions: satellite agency. This information is in the satellite agent in NS2 simulation and modeling, very indicative.
- 2022-02-06 02:39:58下载
- 积分:1
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是一种主动探测工具pathChirp估计的可用带宽
pathChirp is an active probing tool for estimating the available bandwidth on a communication network path. Based on the concept of "self-induced congestion," pathChirp features an exponential flight pattern of probes we call a chirp. Packet chirps offer several significant advantages over current probing schemes based on packet pairs or packet trains. By rapidly increasing the probing rate within each chirp, pathChirp obtains a rich set of information from which to dynamically estimate the available bandwidth.
- 2022-01-25 22:17:59下载
- 积分:1
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This is a Lagrangian of Matlab interpolation procedures, numerical simulation st...
这是一个Matlab的拉格朗日插值程序,供学生学习数值模拟学习下载。
- 2022-07-10 16:42:15下载
- 积分:1
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高版本wtl库,用于喜欢WTL的用户
高版本wtl库,用于喜欢WTL的用户-high version for Windows Template Library, for users like WTL
- 2022-07-20 08:36:21下载
- 积分:1
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这是一个VHDL(硬件描述语言)的编译器,更确切说是一个解释器,输入是VHDL语言,输出是经过提到后的符号表,也就是将VHDL中的重要变量比如输入输出变量和DF...
这是一个VHDL(硬件描述语言)的编译器,更确切说是一个解释器,输入是VHDL语言,输出是经过提到后的符号表,也就是将VHDL中的重要变量比如输入输出变量和DFF等保存下来。-This is a VHDL (hardware description language) compiler, more precise explanation is a device that is VHDL input, output was mentioned after the symbol table to VHDL is the important variables such as input and output variables and other DFF preserved.
- 2023-06-03 15:35:03下载
- 积分:1
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under the management system 2.0
下在管理系统2.0-under the management system 2.0
- 2022-12-12 20:50:03下载
- 积分:1