IAR avr serial procedures, Proteus has the simulation, easy to learn.

touchsceen_test ├─ main.c C语言主源文件 ├─ AscII6x8.c Ascii字符6x8点阵显示格式数据 ├─ lcd.c LCD显示函数源文件 ├─ lcd.h LCD定义头文件 ├─ Call_int.s 中断处理文件 ├─ tp.c 触摸屏控制函数源文件 └─ tp.h 触摸屏控制定义头文件-touchsceen_test East main.c C-language source East Main-AscII6x8.c Ascii character dot matrix display delivers data format and technology-lcd.c LCD display function source East-definition LCD lcd.h headers East-Call_int.s interrupt handling documents and technology-tp.c Touchscreen control function-source supply tp.h Touchscreen Control definition files

linux下font显示的文档，说明如何自己做gui时显示各种字符。-under linux font display documents, how do gui their various characters at the show.

一个用于ARM的基4/基5定点FFT算法，原作者是JDB，后来我扩展过16和256点的计算并用在项目中了，感觉速度还不错。现在重写了基于Linux GCC4的测试程序，可供使用者评估参考。建议安装FFTW3用来精确评估测试结果，相关范例已经在代码中了。-Radix 4/5 FFT routines supporting 16/64/256 and 20/80 calculations. The source originally contributed by JDB, I had extended 16 and 256 candidates and used it in our project it has been verified as fast and stable. Now we add some test vectors running on Linux with GCC 4 for testers who want to use or just evaluate it. Installing FFTW3 is recommended for evaluating the code exactly.

完整VC6.0编写的的三菱PLC上位机编程软件源码，以及DebugPLCEDIT。对于程序员而言，具有很好的参考利用价值。

简单的无刷直流电机控制，应用FOC库，带霍尔的，三相六状态，没加入PID，没加入过流、过压保护。

This model is just testing an idea of MIMO, which IEEE802.11n will have. But I havo not seen the standard, I tried to make it with 11a. Actually this model would not work in real world, because the preambles were not designed to solve the MIMO feature. But this model may be useful to get some idea to start to design a PHY with MIMO. -This model is just an idea of testing MIMO. IEEE802.11n which will have. But I havo not seen the standard. I tried to make it with 11a. Actually this model w ould not work in real world. because the preambles were not designed to solv e the MIMO feature. But this model may be useful t o get some idea to start to design a PHY with MIMO.

变压器概述-变压器经典文章（中文PDF）-outlined transformer- transformer classic article (Chinese PDF)

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented

多种时钟下的汇编延时程序，基于定时器的，精准-Compilation of a wide range of clock delay under the process, based on the timer, precision

南瑞的IEC104规约实现的源码，对于从事电力行业通信开发的人员来说还是非常具有参考价值的-NAN realization of the Statute of the IEC104 source, engaged in the power industry for the development of the communications staff, they still have great reference value