数控插补器设计

EP2C35A实验箱基于NIOSII的串行AD_DA编程(EP2C35A experimental box based NIOSII the serial AD_DA programming)

这是基于verilog hdl的数字时钟源代码，能够实现时分秒的计时，可以手动进行调时与调分。(This is based on the digital clock verilog hdl source code, can be achieved when every minute of the time, you can adjust the time manually adjusting points.)

这是一个利用verilog语言编写的信号发生器的例子，值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)

说明：  基于FPGA的信号发生器，产生了正弦波，方波，锯齿波和三角波四种波形，按下一次按钮，波形切换一次。按下另一个按钮，改变波形的频率(The signal generator based on FPGA can generate four kinds of waveforms: sine wave, square wave, sawtooth wave and triangle wave. Press the button once and switch the waveform once. Press another button to change the frequency of the waveform)

说明：  在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)

2011年 电赛 E题 简易数字信号传输性能分析仪FPGA信号发生部分 包括m序列，伪随机序列，曼彻斯特编码 程序 和单片机部分程序(2011 CEC E title simple digital signal transmission performance analyzer FPGA signal part of the program and single-chip part of the program)

This Book description about LCD in Board DE2

ps2 vga interface in vhdl code

基于verilog的DDS设计,内附代码,仿真环境等说明(the DDS design based on verilog)

基于FPGA的VHDL，can总线控制的设计与实现，在ISE下弄的。(FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.)