终结者扰频器

SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中(SOPC system I2C code directly available, can be used as an IP core in your system)

ppm调制的verilog代码 可实现ppm调制(ppm modulation verilog code ppm modulation)

nios processor example 1

spartan3e 开发板上调试ARM7功能，添加了基本的IO与UART，代码包括逻辑部分与Keil C测试工程

51单片机测试程序，ＩＣ:UC1676,4线串口(51 MCU test program, IC:UC1676 4-LINE, SPI INTERFACE)

用verilog实现64点，128点，256点的fft(64 points, 128 points, and 256 points FFT are implemented with Verilog)

利用matlab设计了一个切比雪夫滤波器，并且对滤波器性能进行了仿真分析。(Using the matlab design a chebyshev filter, and has carried on the simulation analysis on filter performance. )

产生高斯最小相移键控信号的阐述仿真，包括调制解调、信道模型等。(Simulation program to realize GMSK transmission system)

联邦滤波法，毕设时写的，可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)

约束所有时钟（包括你的设计中特有的时钟）对准确的时序分析结果而言是必不可少的。Quartus II TimeQuest Timing Analyzer为各种各样的时钟配置和典型时钟提供许多SDC命令。(Constraining all clocks, including the clocks unique to your design, is essential for accurate timing analysis results. The Quartus II TimeQuest Timing Analyzer provides many SDC commands for a variety of clock configurations and typical clocks.)