基于fpga的SPI接口实现

本程式是利用Verilog HDL 來實現來實現數位電路的實現，實現電路為Error Correcting Code之中的Hamming Code 來解決系統之中的錯誤位元 並且偵測位元並且還原。

如何用VHDL语言对时钟进行分频以达到计数目的(how to achive counting by VHDL Language)

xilinx 的8B10B编解码源码, 里面有仿真模型,用以测试验证(xilinx 8B10B encode/decode source)

应用背景EPM3064 FPGA控制8个通道开关控制，实现音响信号输入切换和信号混合.简化控制电路，减少电路板空间。关键技术电路运行可靠安全，接模拟电路输入信号选择器CD444DJ可以控制8通道模拟数信号通断。 1、实现高速任意通道的开启和关闭 2、LED指示开启通道。 3、输出电路心跳指示，显示电路工作状态。

quartus license dede(quartus 11.0 license)

用vhdl写实用96例子, 有RAM，PID 等(Using VHDL to write practical examples of 96, there are RAM, PID and so on)

Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.

quartus verilog 逻辑分析仪， 检测数字信号（与示波器检测模拟信号对应），vga显示输出。经过本人调试可用。

说明：  verilog语言编写的dac5687的接口程序，串行模式控制。(written dac5687 verilog interface program, serial mode control.)

（1）MTI （2）用FFT实现MTD （3）用FIR滤波器实现MTD ((1) MTI (2) using FFT realization MTD (3) with the FIR filter implementation MTD)