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57578865dac_sigma_delta
对delta sigma进行设计,实现delta sigma ADC的设计(this is use for delta sigma adc ,and design and achieve adc)
- 2020-06-16 14:40:01下载
- 积分:1
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Nexys 4 实现数码管显示时钟
在Nexys4开发板上实现一个时钟的显示,利用了视觉暂留的功能实现数码管的输出,但因为时间问题,小时的位数只设计了一位,需要两位的话加一位即可。
- 2022-04-06 23:12:18下载
- 积分:1
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A402-OutputTFT-LCDDriverICWithPower
文档主要是关于TFT-LCD的相关资料,是有关TFT-lcd芯片的结构与设计理念,对于在这方面学习的朋友有比较大帮助(402 output thinfilm transistorliqu idcrystal display(TFT-LCDdriver integrated circui(ICwith power controlbasedon the number of color stobe displaye disdescribed.
Toachievethistypeofpowercontrol,referencevoltagebuffersare
turnedonandoffaccordingtotheselectednumberofcolors.)
- 2011-08-20 17:08:00下载
- 积分:1
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SDRAM
说明: SDRAM的驱动程序,主要是对SDRAM各类状态进行驱动,有刷新模块、读、写模块等。(The driver of SDRAM mainly drives various states of SDRAM, including refresh module, read and write module.)
- 2020-06-23 01:40:02下载
- 积分:1
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Radar-on-FPGA
主要论述了基于FPGA的末制导雷达伺服系统设计。结合末制导雷达讨论其电机控制、二阶伺服系统性能和PID校正算法,利用VHDL语言设计,实现基于FPGA的方位步进电机开环定位控制和俯仰直流电机闭环速度控制的伺服系统。结合实际应用中遇到的问题,提出了基于"反馈控制"理论的有效的补偿算法,该算法提高了伺服系统的稳定性、快速性和精度。(Mainly discusses the design of terminal guidance radar servo system based on Field Programmable Gates Array(FPGA).It includes the system’s electric machine control,second-order servo system performance and PID correction algorithm based on Virtual Hardware Description Language(VHDL) on azimuth stepping motor open loop positioning control and pitch direct current electric machine closed loop speed control of the FPGA servo system.In allusion to some factual problems during its application,presents corresponding effective solutions based on traditional control theory "Feedback Control".The fact proves that these methods can greatly improve the stability,speediness and precision of the original servo system.Additionally,a basic algorithm which can be realized in a terminal guidance radar servo system is given)
- 2012-08-11 17:51:55下载
- 积分:1
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verilog-digital-system-design-
verilog数字系统设计,一本很好的verilog学习的书籍,很适合初学者(verilog digital system design, a good verilog learning books, it is suitable for beginners)
- 2021-01-10 20:28:50下载
- 积分:1
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基于FPGA的DDR3控制器
这个代码为基于XILINX FPGA的DDR3控制部分,实用性很强,忍痛拿来分享,望各位笑纳。
- 2022-04-13 09:35:34下载
- 积分:1
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timescale-1ns
说明: 这是一款由晶振产生的脉冲控制的数字钟,可以从00:00:00到23:59:59之间进行计时。(this is a clolk controlled by continuious pulse.it can timing from 00:00:00 to 23:59:59.)
- 2011-04-13 19:21:39下载
- 积分:1
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raised-cosine-filter
代码实现了一个根升余弦成型滤波器,2PAM信号通过此成型滤波器,并且匹配接收,画出了发送和接收波形,验证了代码的正确性。(The code designs a root raised cosine filter,2PAM signal transmitted through the filter and matched using the same filter, I plot the transmitted signal and received signal to verify the correctness of the code.)
- 2012-11-09 21:59:53下载
- 积分:1
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IIR
使用verilog语言描述的二阶巴特沃斯IIR滤波器,程序中有参数说明,已经运行通过(Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter description has been run through)
- 2013-06-18 16:30:35下载
- 积分:1