vb prepared by the OMRON PLC communication procedures, has been used in practica...

这段代码将显示一个单独的字符，将单独运行，它将提取一个字符。从存储字符串

MPC860的SCC1配置以太网示例代码-MPC860 SCC1 configuration Ethernet sample code

uItron 4.0 Toppers实现源码1.4版 -and 4.0 Toppers achieving source version 1.4

用51单片机串口及595制作16X56LED显示屏(土产)-With 51 and 595 produced single-chip serial 16X56LED display (native)

II2c driver for uclinux

本代码是用单片机控制DDS芯片输出DDS信号 。该信号包括FSK调制信号和线性调频信号-This code is used to control single-chip DDS chip DDS output signal. The signal including the FSK modulation signal and linear FM signal

ucos移植心得，使用ucos的朋友应该要看看，会学到很多东西的。ucosII源码分析，暂时抛弃那些Event/MailBox、信号量等元素 而且在51单片机上移植实现其功能-ucos移植心得，使用ucos的朋友应该要看看，会学到很多东西的。ucosII源码分析，暂时抛弃那些Event/MailBox、信号量等元素 而且在51单片机上移植实现其功能

Android a programmers guide

应用背景Abstract—Leros is a tiny microcontroller that is optimized for current low-cost FPGAs. Leros is designed with a balanced logic to on-chip memory relation. The design goal is a microcontroller that can be clocked in about half of the speed a pipelined on-chip memory and consuming less than 300 logic cells. The architecture, which follows from the design goals, is a pipelined 16-bit accumulator processor. An implementation of Leros needs at least one on-chip memory block and a few hundred logic cells. The application areas of Leros are twofold: First, it can be used as an intelligent peripheral device for auxiliary functions in an FPGA based system-on-chip design. Second, the very small size of Leros makes it an attractive softcore for many-core research with low-cost FPGAs.关键技术The smallest core is comparable to Leros and can be implemented

用C++编程读取GPS数据的基类，适用于wince操作系统