QC LDPC的编码译码 代码与论文配套 是研究生毕设 可运行 代码风格优秀(QC LDPC Coding and Decoding Code and Paper Matching are Excellent Style of Running Code for Graduate Students)

VHDL数字电路设计的电子书，很好的学习材料-VHDL digital circuit design of e-books, very good learning materials

VHDL 乘法器 源代码，很好的VHDL 入门学习例程序-Multiplier VHDL source code, a good learning example VHDL entry procedures

说明：  fft代码,采用蝶形算法,包括C,matlab和verilog代码(fft code, using butterfly algorithm, including C, matlab and Verilog code)

单相的主动式电压质量控制器 对电压跌落进行了补偿(single-phase AVQR for power quility improvement)

此程序为串行通信程序,采用verilog语言编写的,经过仿真验证已经通过.-This procedure for the serial communication procedures, the use of Verilog language, after simulation has been adopted.

Spartan® -3E 现场可编程门阵列家族是为满足对成本敏感的消费电子大量应用的需要 而特别设计的。 (Field Programmable Gate Array family needs is to meet the cost-sensitive applications, a large number of consumer electronics Specially designed.)

光纤通道协议，包括FC-SW,FC-FS,FC-LS,FC-GS,FC-HBA,FC-AE-ASM等文档。 (Fibre Channel protocols, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and other documents.)(Fiber channel protocol, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and other documents. (Fibre Channel protocols, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and FC-AE-ASM))

SDRAM 控制器的多 CPU 系统的公断人将调度内存访问。

用verilog编写的信号调制解调程序，包括ask,fsk,qpsk的fpga实现(Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation)