VHDL 函数信号发生器 VHDL 函数信号发生器

vc6.0编译通过.-vc6.0 compile.

点阵字模工具示例-example

图形界面。可以对通讯录进行添加、查找、删除。可以进行上翻、下翻和看首页、尾页等操作。没有任何BUG-graphical interface. The directory can be added for, locate, delete. There can be turned, and turned to see where Home, tail-page operational. No BUG

beereader source code

de2开发板的电路，为pcb,powerpcb格式，看看高手如何布板-DE2 development board of the circuit, for pcb, powerpcb format, take a look at how the cloth plate master

扫地雷小游戏，如果周围格子变成白色则没有雷，出现红旗则有雷2-Discredited mine game, if the surrounding lattice into a white is not mine, there were red flags have mine 2

一个简单的碟片出租管理系统，使用VB和ACCESS编写。-a simple disc rental management system, using VB and Access prepared.

动态求解八Queen问题的源代码,计算速度比较快-8 Queen of the source code, faster computing speed

USB 1.1的verilog代码，已通过fpga验证-USB 1.1 in Verilog code, has passed through FPGA verification

SampleAndroid : the base sample project for android