FPGA秒表

基2-256点的Verilog HDL代码。具体程序结构说明参考word文档。                                                                                               

说明：  agilex fpga description

滤波器 Generaic FIR Filter(Generaic FIR Filter)

用Verilog实现自动售货机功能，代码较初级。易懂，内含test文件。(Automatic vending machines function with Verilog code than the primary. Understandable, containing test files.)

veriog code for fodm.It includes transmitter and receiver. Transmitter part has serial in parallel out, decoder, interleaver, IFFT and finally to the transmitter block. Receiver part has the reverse order to transmitter.

用verilog语言实现加密芯片DS28E01的调用操作命令。(Using Verilog language to achieve the encryption chip DS28E01 call operation commands.)

VIP FPGA板的配套例子，这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)

ATSHA204_S加密芯片资料，学习使用该芯片必读资料(ATSHA204_S encryption chip data, required reading for learning to use the chip)

pll(phase locked loop) is used to fix the circuit to particular frequency

, verilog语言实现的高速DACAD9747的SPI接口及寄存器配置