赛灵思ddr3控制器

Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.

音频编码（ADPCM位） ；

一个关于VERILOG与VHDL混合编程，混合验证的资料(A hybrid programming on VERILOG and VHDL, mixed verification data)

此代码包含真正的双端口 ram 接口使用 verilog 代码。在这里，您可以检查读的操作，写操作。通过仿真验证。包括的每个行的注释，理解的操作和流程的代码。去通过它以供参考。

收集的关于数字锁相环的理论模型和分析讨论，适用于FPGA的数字电路设计。(Theoretical models and analysis and discussion about digital PLL collected for FPGA-based digital circuit design.)

saber的仿真模型，是一个电源的，经过调试已经成功(The simulation model of the saber, is a power, after commissioning has been successfully)

说明：  基于quartus2的jk触发器设计，内含源码和仿真图(Jk flip-flop design based on the quartus2, containing source code and simulation diagram)

该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序，FPGA上的VERILOG通信程序。(The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program)

OFDM通信系统完整的收发Verilog代码(Verilog code of OFDM communication system)

说明：  ddr2原理图设计，原厂电路图设计，很好很强大 16bit(ddr2 schematic design, the original schematic design, a very powerful 16bit)